While the big GPU-related announcement out of today’s AMD Financial Analyst day was the Radeon Vega Frontier Edition, as part of his presentation, AMD’s CTO Mark Papermaster also offered a brief update of AMD’s GPU architecture roadmap.

The admittedly high-level overview doesn’t significantly expand on AMD’s last roadmap from 2016, but it does offer a fresh look at AMD’s timeline, while confirming that yes, as you’d expect, they are indeed working on a post-Navi architecture.

The most useful aspect of the new roadmap is that it helps to illustrate which process nodes which architectures will be on. We’ve known for some time now that there are multiple Vega GPUs, but it hasn’t been clear how they’re organized – if it’s a big/little pair like Polaris 10 and 11 – or something else entirely. This latest roadmap strongly hints at the latter, noting that AMD is making both 14nm and “14nm+” chips, the latter presumably being our second Vega.

14nm+ is not an official GlobalFoundries designation at this time, but it is not surprising to see AMD planning for multiple generations of 14nm. As progress on new manufacturing nodes slows and costs continue to rise, all of the major foundries have begun offering multiple generations of leading-edge processes, to allow them to iterate on a process over multiple years and further improve it. Until 7nm is ready, an enhanced 14nm process will help AMD continue to improve their products over the next year or so.

Speaking of 7nm, the updated roadmap also confirms that Navi will be produced on a 7nm process. AMD’s partner and former in-house fab group GlobalFoundries has been pushing hard to bring up 7nm, and they are the most likely fab for AMD to use. Besides the use of 7nm, we also know from previous AMD roadmaps that the company is looking into both scalability and next-generation memory for their future architecture.

Finally, beyond Navi we have the unnamed “Next Gen” architecture for the last segment of AMD’s 3 year roadmap. This latest update confirms that AMD is indeed working on a 3rd GPU architecture, and that it will be built upon a refined 7nm process. Besides that, AMD isn’t saying anything about what it might feature at this time.

Meanwhile, it’s interesting to note that AMD is continuing to produce new GPU architecture roadmaps – even if they are at a high level – while rival NVIDIA has curtailed them entirely. This is an interesting inversion of the status quo; for the longest time it was NVIDIA who laid out long roadmaps while AMD kept their cards close. So for the first time in a long time, we have a better idea of what AMD is planning than their competition.

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  • mode_13h - Thursday, May 18, 2017 - link

    If you're saying CPU and GPU architectures will fuse, you're just wrong. GPU cores will be in-order, because that's where the power efficiency is. CPU cores will need to remain out-of-order, because that's how to get best single-thread performance. I used to think "hey, why not fuse them?", but then you end up with Xeon Phi, which is about half as fast as a GP100.

    Also, cache hierarchies & memory consistency guarantees rob CPUs of some power-efficiency & performance.
    Reply
  • Tabalan - Thursday, May 18, 2017 - link

    That's not what I mean. I said that GPU division will follow CPU division - they will create brand new uarch, but it will be more of an expanse of GCN strong points. The same way they did with Ryzen. Reply
  • peevee - Saturday, May 20, 2017 - link

    " GPU cores will be in-order, because that's where the power efficiency is. "

    Out-of-order can be still efficient, if it is not speculative.

    "CPU cores will need to remain out-of-order"

    Only because of some stupid inefficiencies in the current computer architecture.

    BTW, I have invented CPU/computer architecture which can replace not just GPUs, DSPs, ISPs and even fixed-function blocks (the latter with some efficiency loss, but not nearly as big as currently). Not Von Neumann-based at all. Nor it is Harvard. The future is bright. Physics will soon limit their ability to "innovate" by making transistors smaller and smaller (they already fail to produce honest reductions since 32nm, even having to prolong development cycles and switch from 2 y to 3 y cadence). Just like physics limited their ability to just raise frequency beyond 4GHz 12 years ago.
    Reply
  • extide - Thursday, May 18, 2017 - link

    Honestly, I don't think scalability means multiple GPU dies... yet. I think it is referring to something different. What has been common all the way from Tahiti to Vega...? 4 chunks of CU's and thus 4 geometry engines. I am betting Navi will finally split that out more like nVidia does and have a finer granularity on the geometry engines because that has ALWAYS been a bottleneck on AMD GPU's.

    I think we are still a few more years away from multi-die GPU's acting as one... but yes, I do believe that will eventually be the future. I mean, 800+mm^2 GPU's are just ridiculous...
    Reply
  • MajGenRelativity - Thursday, May 18, 2017 - link

    Vega already has the geometry engine improvements that you mentioned, but maybe Navi will be the first time we see chips actually go beyond a 4-wide frontend? Reply
  • vladx - Wednesday, May 17, 2017 - link

    Wow that's bad, it's like he's saying "we actually have no plan". Reply
  • jordanclock - Wednesday, May 17, 2017 - link

    That's not true at all. CPU and GPU architectures are planned and designed starting years in advance. Reply
  • p1esk - Wednesday, May 17, 2017 - link

    Nvidia is crushing them so bad, they have no clue what to do next. Deep learning is where the money is/will be, and they don't even mention it. Reply
  • Nicolii - Wednesday, May 17, 2017 - link

    You will find that AMD is partnering with Google in terms of deep learning, I don't think visibility will be a problem there.

    http://www.amd.com/en-us/press-releases/Pages/amd-...
    Reply
  • p1esk - Wednesday, May 17, 2017 - link

    Yeah, that "partnership" was announced more than 6 months ago. No news since, and still no AMD GPUs on Google cloud... Reply

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