Motherboards, Sockets, Pins and Things

As an OEM only launch, details about exact systems coming to market (and how they are designed) is providing slim pickings. With a normal retail launch, we have several motherboard manufacturers to dig our teeth into when asking questions, however our relationships with the major OEMs such as HP, Dell or Lenovo are quite different and typically more product focused and less engineering. We’ve not seen any real Bristol Ridge related announcements on OEM systems coming into the market, but some do exist. Reddit user starlightmica saw this HP Pavilion 510-p127c in Costco this week:

$600 gets an A12-9800, 16GB of DDR4, a 1TB mechanical drive, an additional R7 2GB graphics card, 802.11ac WiFi, a DVDRW drive, and a smattering of USB ports (but no USB 3.1, which is interesting).

We reached out to HP, as this system was listed online with the blurriest of motherboard images.

This is a ‘Willow’ motherboard, and we can see the AM4 socket in the middle. Contrary to previous platforms, it is worth noting that the socket mounting holes are significantly more ‘square’ than previous motherboard designs. However, when we discussed the images of the South Korean overclocker near the beginning of this article, it looked like he was using a standard AMD Wraith cooler, which might suggest that this square mounting hole situation might just be HP designing the motherboard.

The board clearly has six phases as part of the power delivery, plus an additional phase for the memory. I would assume that since the system has dual channel support, HP has developed the two memory slots as having dual channel capability, and the abundance of traces from the APU seems to suggest that as well.

To the right of the DRAM slots seems to be a PCIe x1 slot, which is where I assume the WiFi module is held. Below this slot are two of the system SATA ports, followed by what looks like a chipset with a big AMD logo on it and then the 24-pin power connector.

The motherboard has a full PCIe 3.0 x16 sized slot, although as we discussed before, this will be limited to PCIe 3.0 x8 due to the design of the processor. To the left of this is clearly a Realtek audio codec, and judging by the 2.1 support on the rear panel, this is most likely an ALC269 or some other low-end codec. It is hard to tell where the network controller is here without the high-resolution image, but just above and to the left of the speaker looks like a small IC which looks similar to Realtek’s low-end solutions. Typically Realtek offers a deal when audio+networking chips are used in the same system, so I suspect that is what is happening here. Above this are our USB ports, an HDMI output, and a VGA port which must be using a DP-to-VGA IC onboard.

We have closer up images of the socket, thanks to the Hungarian website hwsw:

This looks like the standard ZIF socket we’ve come to love/loathe from AMD (I doubt there’s a way that keeps everyone happy anyway), and others have counted 1331 holes which may/may not do things.

The rear of the CPU, also from hwsw, is what we would expect given the socket layout. It does mean that AMD is stuck at this level of connectivity, to anyone wishing for a quad-channel AMD platform suitable for consumers will have to wait until a future platform. It’s also worth noting that this looks like a similar size to when AMD CEO Lisa Su held up a Zen chip for the press back at the Zen announcements in August.

What Happens Now

Aside from spotting systems like the HP in Costco, no doubt a number of media outlets (us included) are trying to get hold of a number of the APUs for official reviews. As mentioned previously, that A12-9800 looks like an exciting all round part. We are working with AMD to secure the platform and the APUs for testing.

AMD has told us that Bristol Ridge APUs are designed to have price parity with the current Kaveri Refresh/Godavari models, however exact configurations of APUs and coolers, as well as a timeframe for the motherboard manufacturers to come out with their designs, is still to be decided.

I suspect that AMD will wait until closer to the Zen launch window to put Bristol Ridge on the shelves. Attacking the market with a new platform that goes from the high-end desktop through to all but the cheapest systems would mean a concerted effort to gain market share and recognition for catering to the performance needs of as many users as possible all at once. AMD has promised that Zen will trickle down the stack, however as we were told regarding their server and laptop plans later in 2017, that will mostly likely occur later in the year also.

If you’ve read through this piece, or merely skipped to the last page for the conclusions, here’s the take away from the Bristol Ridge for desktop launch:

- OEMs first, DIY builds later
- The A12 at 65W has better specifications than the best previous generation A10 at 95W
- Even at 65W, there is +30% frequency on the integrated graphics for the A12-9800
- The chipsets support USB 3.1 (10 Gbps) natively, but Type-C requires a small additional chip
- Bristol Ridge is more like an SoC, the chipset is entirely optional
- There are so many fun things you can do with PCIe and switches
- We expect the retail APUs to be price drop-ins for current APUs
- We’re trying to get these APUs for review. Stay tuned.

 

The Two Main Chipsets: B350 and A320
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  • ddriver - Saturday, September 24, 2016 - link

    Hey, at least Trump is only preposterous and stupid. Hillary is all that PLUS crazy and evil. She is just as racist as Trump, if not more so, but she is not in the habit of being honest, she'd prefer to claim the votes of minorities.

    Politics is a joke and the current situation is a very good example of it. People deserve all shit that coming their way if they still put faith in the political process after this.
  • ClockHound - Friday, September 23, 2016 - link

    +101

    Particularly enjoyed the term: "walled garden spyware milking station" model

    Ok, not really enjoyed, cringed at the accuracy, however. ;-)
  • msroadkill612 - Wednesday, April 26, 2017 - link

    An adage I liked "If its free, YOU are the product."
  • hoohoo - Friday, September 23, 2016 - link

    I see what you did there! Nicely done.
  • patrickjp93 - Saturday, September 24, 2016 - link

    No they aren't. If Geekbench optimized for x86 the way it does for ARM, the difference in performance per clock is nearly 5x
  • ddriver - Saturday, September 24, 2016 - link

    You have no idea what you are talking about. Geekbench is very much optimized, there are basically three types of optimization:

    optimization done by the compiler - it eliminates redundant code, vertorizes loops and all that good stuff, that happens automatically

    optimization by using intrinsics - do manually what the compiler does automatically, sometimes you could do better, but in general, compiler optimizations are very mature and very good at doing what they do

    "optimization" of the type "if (CPUID != INTEL) doWorse()" - harmful optimization that doesn't really optimize anything in the true sense of the word, but deliberately chooses a less efficient code path to purposely harm the performance of a competitor - such optimizations are ALWAYS in the favor of the TOP DOG - be that intel or nvidia - companies who have excess of money to spend on such idiotic things. Smaller and less profitable companies like amd or arm - they don't do that kind of shit.

    Finally, performance is not magic, you can't "optimize" and suddenly get 5X the performance. Process and TDP are a limiting factor, there is only so much performance you can get out of a chip produced at a given process for a given thermal budget. And that's if it is some perfectly efficient design. A 5W 20nm x86 chip could not possibly be any faster than a 5W 20nm ARM chip, intel has always had a slight edge in process, but if you manufacture an arm and a x86 chip on identical process (not just the claimed node size) with the same thermal budget the amr chip will be a tad faster, because the architecture is less bloated and more efficient.

    It is a part of a dummy's belief system that arm chips are somehow fundamentally incapable of running professional software - on the contrary, hardware wise they are perfectly capable, only nobody bothers to write professional software for them.
  • patrickjp93 - Saturday, September 24, 2016 - link

    I have a Bachelor's in computer science and specialized in high performance parallel, vectorized, and heterogeneous computing. I've disassembled Geekbench on x86 platforms, and it doesn't even use anything SSE or higher, and that's ancient Pentium III instructions.

    It does not happen automatically if you don't use the right compiler flags and don't have your data aligned to allow the instructions to work.

    You need intrinsics for a lot of things. Clang and GCC both have huge compiler bug forums filled with examples of where people beat the compilers significantly.

    Yes you can get 5x the performance by optimizing. Geekbench only handles 1 datem at a time on Intel hardware vs. the 8 you can do with AVX and AVX2. Assuming you don't choke on bandwidth, you can get an 8x speedup.

    ARM is not more efficient on merit, and x86 is not bloated by any stretch. Both use microcode now. ARM is no longer RISC by any strict definition.

    Cavium has. Oracle has. Google has. Amazon has. In all cases ARM could not keep up with Avoton and Xeon D in performance/watt/$ and thus the industry stuck with Intel instead of Qualcomm or Cavium.
  • Toss3 - Sunday, September 25, 2016 - link

    This is a great post, and I just wanted to post an article by PC World where they discussed these things in simpler terms: http://www.pcworld.com/article/3006268/tablets/tes...

    As you can see the performance gains aren't really that great when it comes to real world usage, and as such we should probably start to use other benchmarks as well, and not just use Geekbench or browser javascript performance as indicators of actual performance of these SoCs especially when comparing one platform to another.
  • amagriva - Sunday, September 25, 2016 - link

    Good post. To any interested a good paper on the subject : http://etn.se/images/expert/FD-SOI-eQuad-white-pap...
  • ddriver - Sunday, September 25, 2016 - link

    I've been using GCC mostly, and in most of the cases after doing explicit vectorization I found no perf benefits, analyzing assembly afterwards revealed that the compiled has done a very good job at vectorizing wherever possible.

    However, I am highly skeptical towards your claims, I'll believe it when I see it. I can't find the link now, but last year I've read detailed analysis, showing that A9X core performance per watt better than skylake over most of the A9X's clock range. And not in geekbench, but in SPEC.

    As for geekbench, you make it sound as if they actually disabled vectorization explicitly. Which would be an odd thing. Not entirely clear what you mean by "1 datem at a time", but if you mean they are using scalar rather than vector instructions, that would be quite odd too. Luckily, I have better things to do than rummage about in geekbench machine code, so I will take your word that it is not properly optimized.

    And sure, 256bit wide SIMD will have higher throughput than 128bit SIMD, but nowhere nearly 8 or even 5 times. And that doesn't make arm chips any less capable of running devices, which are more than useless toys. Those chips are more powerful than workstations were some 10 years ago, but their usability is nowhere near that. As the benchmarks from the link Toss3 posted indicate, the A9X is only some ~40% slower than i5-4300U in the "true/real world benchmarks", and that's a 15 watt chip vs the A9X is like what, 5-ish or something like that? And ARM is definitely more efficient once you account for intel's process advantage. This will become obvious if intel ever dare to manufacture arm cores at the same process as their own products. And it is not because of the ISA bloat but because of the design bloat.

    Naturally, ARM chips are a low margin product, one cannot expect a 50$ chip to outperform a 300$ chip, but the gap appears to be closing, especially keeping in mind the brickwall process is going to hit the next decade. A 50$ chip running equal to a 300$ (and much wider design) chip from 2 year ago opens up a lot of possibilities, but I am not seeing any of them being realized by the industry.

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