Single-Threaded Integer Performance: SPEC CPU2006

Even though SPEC CPU2006 is more HPC and workstation oriented, it contains a good variety of integer workloads. Running SPEC CPU2006 is a good way to evaluate single threaded (or core) performance. The main problem is that the results submitted are "overengineered" and it is very hard to make any fair comparisons.

So we wanted to keep the settings as "real world" as possible. We welcome constructive criticism to reach that goal. So we used:

  • 64 bit gcc: most used compiler on Linux, good all round compiler that does not try to "break" benchmarks (libquantum...)
  • -Ofast: compiler optimization that many developers may use
  • -fno-strict-aliasing: necessary to compile some of the subtests
  • base run: every subtest is compiled in the same way.

The ultimate objective is to measure performance in applications where for some reason – as is frequently the case – a "multi thread unfriendly" task keeps us waiting.

Nobody expect the ThunderX to be a single threaded performance wonder. Cavium clearly stated that they deliberately went for a high core count with pretty simple cores. As a result, single threaded performance was not a priority.

However, Facebook and other hyperscalers have indicated that they definitely prefer to get the single threaded performance of a Xeon D. So any competitor challenging Intel should try to keep up with the Xeon D in single threaded performance and offer a throughput-per-dollar/watt bonus. So it is very interesting to measure what single threaded performance the current ThunderX can offer.

Subtest
SPEC CPU2006
Integer
Application Type Cavium
ThunderX
2 GHz
Xeon D-1557
1.5-2.1
Xeon D-1587
1.8-2.4
Xeon E5-2640 v4
2.4-2.6
Xeon E5-2690 v3
2.6-3.5
Xeon E5-2699 v4
2.2-3.6
Xeon E5-2699 v4
2.2-3.6
(+HT)
400.perlbench Spam filter 8.3 24.7 29 33.4 39 32.2 36.6
401.bzip2 Compression 6.5 15.1 17.2 19.8 24.2 19.2 25.3
403.gcc Compiling 10.8 23.1 27.2 30 37.2 28.9 33.3
429.mcf Vehicle scheduling 10.2 32.6 38.4 40.4 44.8 39 43.9
445.gobmk Game AI 9.2 17.4 20.2 22.7 28.1 22.4 27.7
456.hmmer Protein seq. analyses 4.8 19 21.7 25.1 28 24.2 28.4
458.sjeng Chess 8.8 19.8 22.8 25.6 31.5 24.8 28.3
462.libquantum Quantum sim 5.8 47.9 58.2 60.3 78 59.2 67.3
464.h264ref Video encoding 11.9 32 36.6 41.9 56 40.7 40.7
471.omnetpp Network sim 7 17.3 23 23.6 30.9 23.5 29.9
473.astar Pathfinding 7.9 14.7 17.2 19.8 24.4 18.9 23.6
483.xalancbmk XML processing 8.4 27.8 33.3 36.2 45.1 35.4 41.8

Although some of you have a mathematical mind and are able to easily decipher these kinds of tables, let the rest of us be lazy and translate this into percentages. We make the Xeon D-1581 the baseline. The Xeon D-1557's performance is more or less the single threaded performance some of the important customers such as Facebook like to have.

Subtest
SPEC CPU2006
Integer
Application Type Cavium
ThunderX
2 GHz
Xeon D-1557
1.5-2.1
Xeon D-1581
1.5-2.1
Xeon E5-2640
2.4-2.6
400.perlbench Spam filter 29% 85% 100% 115%
401.bzip2 Compression 38% 88% 100% 115%
403.gcc Compiling 40% 85% 100% 110%
429.mcf Vehicle scheduling 27% 85% 100% 105%
445.gobmk Game AI 46% 86% 100% 112%
456.hmmer Protein seq. analyses 22% 88% 100% 116%
458.sjeng Chess 39% 87% 100% 112%
462.libquantum Quantum sim 10% 82% 100% 104%
464.h264ref Video encoding 33% 87% 100% 114%
471.omnetpp Network sim 30% 75% 100% 103%
473.astar Pathfinding 46% 85% 100% 115%
483.xalancbmk XML processing 25% 83% 100% 109%

First of all, single threaded is somewhat better than we expected when we received the first architectural details (a very simple dual issue core with high latency shared L2). However, this is still a fraction of the Xeon D's single threaded performance, which means that ThunderX doesn't look very impressive to companies which feel that single threaded performance should not be lower than a low end Xeon D. The latter is 2 to 4 times faster. On average, the Xeon D-1581 delivers 3 times faster single threaded performance than the ThunderX, but not 5!

SPEC CPU2006 allows us to characterize the ThunderX core a bit better. We ignore libquantum because it has a very special profile: you can triple the score with specific compiler settings, but those settings reduce performance by 2-30%(!) in some other subtests. Those compiler settings optimize cache utilization by splitting records of an array in separate arrays. Combine this with software loop prefetching and libquantum numbers can indeed double or triple. Since libquantum is hardly relevant for the server world and is known for being a target for all kind of benchmark trickery, we ignore it in our comparison.

Mcf exhibits a large amount of data cache misses and memory controller usage. Mcf is also "horribly low IPC" software, so beefy execution backends do not help. Despite those facts, the ThunderX does not do well in mcf. Mcf does a lot of pointer chasing, so the high latency L2-cache and the high latency DRAM access are slowing things down. That is probably also true for XML processing and the network simulator: those subtests have the highest data cache misses.

The shallow pipeline and relatively powerful gshare branch predictor make the ThunderX a better than expected performer in the chess (sjeng), pathfinding (astar), compiling (gcc) and AI (gobmk). Although the gobmk has a relatively high branch misprediction rate on a gshare branch predictor (the highest of all subtests), the ThunderX core can recover very quickly thanks to its 9 stage pipeline. Notice also that gobmk and gcc have relatively large instruction footprints, which gives the ThunderX and its 78 KB I-cache an advantage.

That is also true for the perl, but that benchmark has a relatively high IPC and needs a beefier execution backend. Indeed, the more compute intensive (and thus high IPC sub tests) perlbench and hmmer perform badly relative to the Intel core. In these benchmarks, the wide architecture of the Intel cores pays off.

Benchmarks Versus Reality Multi-Threaded Integer Performance: SPEC CPU2006
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  • willis936 - Thursday, June 16, 2016 - link

    Are you sure that the there are more cores at lower clocks to keep voltage lower? Power consumption is proportional to v^2*f. Reply
  • ddriver - Friday, June 17, 2016 - link

    Say what? Go back, read my previous post again, and if you are going to respond, make sure it is legible. Reply
  • willis936 - Friday, June 17, 2016 - link

    Alright well if you don't understand why many slower cores are more power efficient even if there was a 0 cycle penalty on context switching then you aren't worth having this discussion with. Reply
  • blaktron - Wednesday, June 15, 2016 - link

    48 cores of server processing on 16mb of l2 and 4 channels of RAM? What is this thing designed for. Will be like running single channel celerons as server processors, so decent hypervisor hosts are out, and so is any database work more complex than dynamic web pages. Reply
  • Haravikk - Wednesday, June 15, 2016 - link

    Facebook is specifically mentioned as being interested in this, so dynamic web-pages is definitely a valid use-case here. HHVM for example is pretty light on memory usage (so is PHP7 now), especially in high demand cases where you're really only running a single set of scripts, probably cached in a compiled form, plus both scale really well across as many cores as you can throw at them.

    Things like nginx and MariaDB will be the same, so they're absolutely intended use-cases for this kind of chip, and I think it should be very good at it.
    Reply
  • blaktron - Wednesday, June 15, 2016 - link

    With no L3 and slow RAM access I'm not sure where you think the scrips will cache. Assuming you ran them on bare metal (horrifying waste of compute) there would be enough, but if you had docker instances or quick spin vms doing your work (as 99% of web servers are) then each instance will only get the tiniest slice of cache to work with. It would be like running your servers, as I said, on a bank of celerons. Except celerons have L3 and don't carry 12 cores per memory channel. Reply
  • spaceship9876 - Wednesday, June 15, 2016 - link

    Hopefully someone will release a server chip using 64 cortex A73 cpu cores, i'm pretty sure the cortex a73 will be more power efficient than xeon d. Xeon d beats cortex a57 in power efficiency but i'm pretty sure than cortex a72 will be similar and cortex a73 will beat it. Reply
  • Flunk - Wednesday, June 15, 2016 - link

    ARM with ambition?

    I've heard that before, nothing came of it.
    Reply
  • CajunArson - Wednesday, June 15, 2016 - link

    Interesting article. This does appear to be the first semi-credible part from an ARM server vendor.

    Having said that, the energy efficiency table at the end should put to rest any misconceived notions that ARM is somehow magically energy efficient while X86 isn't.

    Considering that Xeon E5-2690 v3 is a 4.5 year old Sandy Bridge part made on a 32 nm process and it still has better performance-per-watt than the best ARM server parts available in 2016, it's pretty obvious that Intel has done an excellent job with power efficiency.
    Reply
  • kgardas - Wednesday, June 15, 2016 - link

    2 CajunArson: (1) you can't compare energy efficiency of CPUs made on different nodes. 28nm versus 14nm? This is apple to oranges. (2) Xeon E5-2690 *v3* is Haswell and not Sandy Bridge and it's not 4.5 years definitely. Reply

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