Computex 2002 Day 2: ATI's R300, nForce2 & XScale PDAsby Anand Lal Shimpi on June 4, 2002 11:24 AM EST
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Intel's Springdale Chipset
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After a number of relatively unsuccessful chipset releases, Intel is finally getting their act together and returning to the glory days of being at the top of the chipset business. The Pentium 4 and Xeon chipsets that Intel has released over the past several months have been impressive but they can't even begin to compete with what Intel has coming right around the corner.
Yesterday we talked about Intel's Granite Bay chipset, a dual-channel DDR solution for the high-end desktop and workstation markets but today we learned much about Intel's Springdale chipset.
The Springdale chipset will be sampling in Q4 of this year and should be expected in mass production quantities sometime in the first half of next year. The chipset will feature an updated graphics core (supposedly faster than 845G which is definitely necessary) as well as a dramatically improved I/O Controller Hub (ICH aka South Bridge).
The Springdale Graphics & Memory Controller Hub (GMCH) does have some significant improvements over the current 845G MCH. Other than the improved graphics core (Intel will probably offer a version without integrated graphics), the chipset will offer support for dual channel DDR333 SDRAM bringing a total of 5.3GB/s of memory bandwidth to the CPU.
The chipset will support the current 533MHz FSB Northwood processors as well as the forthcoming Prescott CPU which is currently planned to offer a 667MHz FSB. Intel is also internally referring to the processor-MCH interconnect as a Processor Side Bus (PSB) instead of a Front Side Bus (FSB), just in case you run into that terminology here or elsewhere; the two are identical. We'll talk more about Prescott in a bit, but for now it's important to note that the dual channel DDR333 memory controller will offer exactly enough bandwidth for Prescott's 667MHz FSB (5.3GB/s).
The Springdale GMCH features a new interface that Intel is currently calling their Communications Streaming Architecture (CSA). The CSA bus is an interconnect between the (G)MCH and a high-speed LAN device (e.g. Gigabit Ethernet). The point of the dedicated bus is apparently to prevent Gigabit Ethernet from saturating the MCH/ICH link in the chipset or the PCI bus. The current diagrams of Springdale indicate only one CSA port on the GMCH with aggregate bandwidth equal to about 2Gbps. It will be interesting to get more information on CSA once Intel officially starts talking about it but until then we'll have to live with the rough idea we currently have of it.
The big feature of Springdale is the new Intel ICH5 chip it uses. Serial ATA support and 8 USB 2.0 ports are some of the basic features of the new ICH. Intel will also be releasing a new version of their Application Accelerator (IAA) software that enables software RAID on the new ICH around the release of Springdale. The biggest feature of ICH5 is its integrated Wireless LAN controller (currently 802.11b but that could change by the time it ships); the beauty of the integrated wireless MAC is that a motherboard manufacturer only has to offer an external physical layer (PHY) and wireless LAN can be had relatively cheaply. This is akin to what happened with on-board audio where Intel introduced an AC'97 controller into their ICHs and motherboard manufacturers simply used a cheap AC'97 link on the motherboard itself to offer affordable on-board audio.
There may be a couple versions of Springdale (e.g. Springdale, Springdale-E, Springdale-G) but the basic idea of the platform is as we've just illustrated. The platform will be made available before the release of Prescott but it's clear that the chipset is truly intended to be paired up with the next-generation Pentium 4 processor from Intel.