AMD's 760MPX Chipset - Multiprocessor for the Massesby Anand Lal Shimpi on December 18, 2001 5:00 PM EST
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Better, but not perfect
While it would be great if all of the issues we brought up on the first page were solved, that's unfortunately not the case. The 760MPX does improve on a couple of them but it clearly paves the way for an even superior solution, most likely one for AMD's upcoming Hammer architecture, to truly take off. And we'll hypothesize about that later, but first let's look at how the 760MPX differs from what AMD launched six months ago.
The AMD 762 North Bridge remains unchanged from the original 760MP chipset. Remember that the original chipset had a 64-bit interface to an external PCI bus so the North Bridge wouldn't have to change if support for a 64-bit/66MHz PCI bus were to be included.
Because it's the same North Bridge it features the same benefits that resulted in such stellar performance for the 760MP platform. We've already presented you with a thorough explanation of why the point-to-point bus protocol and MOESI cache coherency provided by the 762 North Bridge and the Athlon architecture result in superior performance. For more information on that as well as the other performance improving factors of the 762 North Bridge take a look at our original 760MP review.
What sets the 760MPX apart from the 760MP is everything outside of the 762 North Bridge. The most obvious enhancement is that there is now a 64-bit PCI bus that runs at 66MHz extending from the 762 North Bridge. This provides 533MB/s of bandwidth across that bus.
The original 760MP chipset only featured a 33MHz 32/64-bit PCI bus (above), while the 760MPX resolves that issue (below)
This 64-bit/66MHz PCI bus supports up to two 32/64-bit PCI devices that operate at either 33 or 66MHz. Now if you stick a 32-bit/33MHz device in one of those slots the bus will default to a 32-bit/33MHz operating mode which obviously ruins the benefits of the bus. Similarly, a 64-bit/33MHz PCI device will reduce the operating frequency of that bus to 33MHz. Why is this important to know?
The 64-bit/66MHz PCI bus is also what connects the AMD 762 North Bridge to the 760MPX South Bridge and thus reducing its operating frequency to 33MHz also reduces the bandwidth between the North and South bridges.
As we just alluded to, the 760MPX does have a new South Bridge and it is the AMD 768. The 768 replaces the old AMD 766 South Bridge which was used ever since the introduction of the AMD 760 chipset back in October 2000. The 768 features a second PCI bus for the platform, this time a 32-bit/33MHz bus for all other peripherals. The only other difference between the 768 and 766 South Bridges is the inclusion of integrated AC'97 audio support.
This is definitely a step in the right direction for AMD, it is a very bold step indeed but there is still a bit of distance to travel before they're officially there. Looking at what they're up against, AMD has already been able to take the performance crown but there's much more to the server market than performance.
Looking at competing solutions from Intel and ServerWorks we can see the need for more PCI buses but the current Athlon platform isn't ready for such an endeavor. Instead, we must look towards the Hammer architecture. With multiple HyperTransport links connecting PCI and PCI-X bridge chips the potential for an equally or more robust platform to be produced by AMD is definitely there. The 760MPX chipset will open many doors for AMD, but it will be the future Hammer platforms that will walk through them.