What does all this mean?

The culmination of all of these limitations and factors to take into account when designing the packaging of a CPU is that new packaging technologies are necessary for tomorrow's CPUs.

Tomorrow's CPUs will be much more complex thus requiring more advanced silicon-substrate interconnect technologies; die sizes will continue to decrease as this happens, creating new routing issues; while all of this is happening CPU clock speeds will increase which requires that even more care be used when designing the entire package.

As clock speeds continue to ramp you can expect to see CPU manufacturers implement advancements in packaging technology. The most recent example of this would be AMD's upcoming Athlon XP CPU which will be AMD's first organic based substrate ever. While Intel has been using organic based substrates for the past few years, AMD has been stuck using ceramic packages for the longest time. The move to an organic based substrate was necessary to allow AMD to ramp to higher clock speeds with their Athlon line of processors.

Although not nearly as high, FSB frequencies are also ramping up as clock frequencies do. Intel's Northwood (0.13-micron Pentium 4) core will eventually use a 533MHz FSB, Intel's Prescott core will use a 800MHz FSB, and their Tejas core will use an incredible 1.2GHz FSB upon its release.

AMD isn't sitting still either; their Hammer line of processors is rumored to have an 800MHz FSB as well. It wouldn't be too shocking if part of the reason for introducing an organic based substrate was to get all of the kinks worked out for a debut on their Hammer processors.

If you remember the early rumors about the desktop Palomino having problems working at the 133MHz FSB, these early issues were most likely packaging related as AMD's manufacturing line adjusted to the new organic packaging.

I've got the power

You've all heard the expression "computers count in 1s and 0s" but your CPU doesn't sit there and count beans all day. Instead it looks at the voltage output of various combinations of transistors and determines whether the output is a 1 or a 0 depending on the value of the voltage (high or low, 5V or 0V, etc…).

Now look at what has happened to CPU voltages over time. The original Pentium 60/66MHz processors ran off of a 5V core voltage and today's CPUs are down to 1.75V and lower. This constant reduction in voltages is making the difference between a "high" voltage signal and a "low" voltage signal very small; this also makes it easy for a low voltage signal plus some noise to be thought of as a high voltage signal, effectively making a 1 out of a 0. This can lead to instability and inaccuracy in calculations so there must be a way around it.

The way to fix this is simple; add capacitors to filter out the noise. The problem with that "simple" solution is that the capacitors have to be placed very close to the core of the CPU and the proximity of the capacitors to the CPU core is governed by, you guessed it, packaging technologies. This is why you see capacitors on the underside of the Pentium 4 CPU as they are as close to the core as possible.

Getting the Word Out Bumpless Build-Up Layer: The Future of Packaging
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  • Googer - Sunday, January 16, 2005 - link

    I cannot beleive after 4 years no one has chosen to comment on such important technology such as this. As of right now Intel has chosen to delay the future of this technology. Reply
  • VasileRT - Thursday, August 19, 2010 - link

    It seems that Intel is finally geting started on this. They are currently hiring for this project. Reply
  • extide - Monday, September 10, 2012 - link

    It is kinda interesting to read this article 11 years later, and see how things have changed. See what stuff came true and what didn't :) Reply

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