A Preview of Intel's Centrino 2 Platformby Anand Lal Shimpi on July 15, 2008 12:00 AM EST
- Posted in
The Lowest Power Core 2 Centrino, Ever
The table below can get a little confusing but it's paramount to understanding the power benefits of Centrino 2:
|Core 2 Duo (45nm Penryn)||Core 2 Duo (45nm Penryn)||Core 2 Duo (65nm Merom)||Core 2 Duo (65nm Merom)|
|Platform||Montevina||Santa Rosa Refresh||Santa Rosa||Napa|
|Vcc (High Frequency Mode)||0.9V - 1.25V||1.0V - 1.25V||1.0375V - 1.3V||1.0375V - 1.3V|
|Vcc (Low Frequency Mode)||0.85V - 1.025V||0.85V - 1.025V||0.85V - 1.05V||0.75V - 0.95V|
|Vcc (Super LFM)||0.75V - 0.95V||0.75V - 0.95V||0.75V - 0.95V||N/A|
|Icc @ 2.4GHz HFM||38A||44A||41A||41A|
The far right column has the first Core 2 Centrino platform, codenamed Napa and to its left we have the beloved Santa Rosa platform. You'll notice that the voltage and current characteristics of these two CPUs are virtually identical, which makes sense since they are both based on the 65nm Merom. The first Penryn parts appeared in the next column over with the Santa Rosa Refresh. Note that here, while the voltages dropped vs. Merom, maximum current draw actually went up to 44A from 41A. This could be due to greater leakage, the higher clock speeds offered by Penryn or simple inexperience with the 45nm process compared to Intel's tried-and-true 65nm process upon its release.
The three platforms we just mentioned however all carry a 34/35W TDP, but now at 2.4GHz with Montevina Intel has lowered the TDP by 10W to 25W. The lower TDP is made possible by dropping voltages a bit further, note that in its highest frequency mode the minimum Vcc has been lowered to 0.9V down from 1.0V. The end result is both lower voltages and lower maximum current draw than any previous Core 2 based Centrino platform.