MCH Read Delay Scaling and Default tRD Settings for Each Strap

Earlier, when we introduced the concept of the memory strap, we also included a table of common memory configurations that contained a column of "Default tRD" values. It's important to realize that these values are associated with the strap and have nothing to do with the actual FSB setting. This is because default operation assumes no overclocking, therefore if the 266 strap is being used then the processor obviously must be running at its rated FSB speed of 266MHz. Adding to this the element of a fully adjustable FSB introduces a new level of complexity that the system was never designed to handle.

This allows us to explain why making use of lower strap settings at one time provided for higher levels of performance - we've created the table below for just this purpose. (We say "at one time" because, as we will soon learn, most motherboards now implement strap changes in a manner much different than was previously done.) For example, selecting the 400 strap and setting a 1:1 memory divider at 400MHz FSB would result in DDR2-800 memory speed. By converting the FSB frequency into a cycle period (time for each clock tick) and then multiplying this value by the strap's default MCH Read Delay (tRD) we can effortlessly calculate the true latency (in nanoseconds) associated with this setting. As an example, dividing 1000 by the FSB (400MHz) gives us 2.5 (nanoseconds) - the co-efficient of 1000 used in this conversion formula was purposefully selected in order to give our result in the proper units. So, 12 times 2.5ns equals 30ns, which we then pair with our derived DDR speed rating of DDR2-800.



We will go into more detail about what this value means, but for the time being simply recognize that we want to minimize this number. We can see that the optimal configuration is one in which we would make use of a lower strap along with a higher FSB. While simultaneously applying these two considerations is obviously paramount in order to take advantage of this affect, the practical application of this approach is bounded in a number of ways. For instance, the near absolute minimum limit on any true read delay latency (tRD) might eventually come into play. We also need to be mindful of which memory dividers are available for the strap of choice, as these will ultimately dictate what final memory speeds are possible. Finally, we will soon learn that there are some strict rules that define whether or not a particular MCH Read Delay (tRD) is allowable, depending on the FSB, memory divider in use, and even the memory Column Address Strobe (CAS) setting.

Now that we have had a chance to apply the simple equation to convert a tRD value into a TRD latency, we are ready to examine a graphic that displays the full breadth of this concept. We have plotted the complete range of FSB speeds encompassed by currently defined straps versus the derived TRD values for each default tRD associated with each strap. That may sound more complicated that what it really is; basically, these lines represent how TRD scales across our FSB window of interest (266 to 400MHz FSB) for each tRD in the table above. We can see that by drawing a vertical line from each default FSB up to the line corresponding to that strap's default tRD, and then reading across always results in the same TRD - 30.0 ns. This is by design, and is precisely how each default tRD was determined for all of the straps we have examined. It may be helpful to think of tRD as another memory timing, except that it has nothing to do with memory and everything to do with the MCH. In this sense it responds to FSB scaling in the same way as other memory timings - CAS (tCL), RAS to CAS (tRCD), Row Precharge (tRP) - the true latency (TRD) always decreases in a manner inversely proportional to FSB, and at some point will reach a minimum where the next higher tRD must be used in order to continue scaling.



What happens if we can set the tRD independent of the strap in use? Of course, the strap selected would still dictate which memory dividers are available, but no longer are we forced to make this change solely for the purposes of modifying tRD. As it turns out, this is exactly how these settings work with most of today's enthusiast motherboards built for overclocking, and the ASUS Rampage Formula is no exception. The ability to set a tRD value, regardless of the strap (i.e. memory divider), allows for a whole new world of possibilities when tuning for enhanced performance.

This brings us to the focus of true improvements made to the X38 chipset, which can be experienced more easily with X48 now. Too many benchmark reviews have been guilty of inappropriately discounting the value of this new chipset by calling the X48 little more than a "speed binned" version of the X38 and then comparing their relative performance at stock speeds. This would be like calling the QX6850 (3.00GHz default clock) a speed binned version of the Q6600 (2.4GHz default clock), benching them head-to-head at an equivalent speed, and then concluding that the QX6850 provides no additional value. Overclocking headroom is exactly what differentiates Intel's current line of Core 2 Extreme CPUs from their mainstream offerings, and it's also what makes the X48 stand head and shoulders above the X38 now that the BIOS designs have matured. When all is said and done, this just makes us wonder who really understands how to overclock the MCH properly.

MCH overclocking takes many forms. One form is something you might already be familiar with, carried out by simply raising the FSB. The problem is that BIOS setup routines will usually provide relief to the MCH by automatically relaxing tRD as the FSB is pushed higher and higher. This effect can easily negate any gains that might otherwise be achieved. Taking control of tRD and manually steering it to a lower value will allow the user to retain the associated performance increase, and as such must also technically be considered overclocking. As with most if not all positive performance adjustments realized while overclocking, this modification comes at a cost - in particular, the need for increased vMCH.

That is not to say that a certain level of headroom does not already exist as an accessible performance boost - it does. While Intel is wise to provide generous levels of margin between pre-established default tRD values and those attainable without the need for any additional voltage, we would consider ourselves foolish if we did not take advantage of this relatively free performance improvement. For instance, looking at the plot of X48 MCH overclocking response curves below we can see that although a default tRD value of 12 is normally used at greater than 400MHz FSB (using the 400 strap), at about 425MHz FSB we should have little to no trouble setting a tRD of 6, even using stock vMCH. The end result this tRD reduction of 6 clocks brings is a total memory read latency decrease of approximately 14.1ns (the difference in TRD values at 425MHz FSB using a tRD of 12 and 6).



With that, we can finally see how this consideration comes full circle - the lower the TRD, the higher the memory read performance and vice versa. This change in TRD also drives vMCH, with lower values requiring substantially more voltage than the more "relaxed" (higher) values. We were able to push our ASUS Rampage Formula to a very impressive 450MHz FSB using a tRD of 5, which correlates to a TRD of about 11.1 ns. Because this required about 1.60V vMCH, for all intents and purposes we would consider this to be the practical limit of scaling, at least with conventional cooling. Above this voltage, we find that the X48 quickly turns into a little furnace during periods of prolonged load. Our recommendation is the liberal use of extra cooling capacity if you feel the need to push any further.

The Clock Crossing Procedure and MCH Read Delay (tRD) Real-World Results: What Does a Lower tRD Really Provide?
POST A COMMENT

73 Comments

View All Comments

  • DragonStefan - Tuesday, June 09, 2009 - link

    Hello all.

    I have:
    - motherboard: ASUS Rampage Formula (Intel X48) (logical) and
    - Corsair XMS2 Dominator Series 2x2048MB Kit PC2-8500 CL5-5-5-15 (TWIN2X4096-8500C5D)

    Should i go for the following setup in bios:
    FSB: 400
    tRD: 5
    Trd: 12,5
    Divider: 3:2
    tCL: 5
    VDDR: High
    Allowed: Yes.

    Or should i go for a different setup?
    If i understand correctly, this is possible..
    What do i forget?
    I made the calculation, and the answer of the Question if it is possible Yes or No, is 1,67 > 1,33. 1,67 is higher than 1,33. So yes..

    Greets From DS
    Reply
  • danderson00 - Thursday, October 23, 2008 - link

    Hi,

    I realise this article is quite old now, but found it very useful for tuning my Rampage Formula. Have achieved significantly increased memory performance from this setting. The board seems to configure them fairly well on the auto setting, but there are some cases where manually tweaking them can give a good performance boost.

    I am curious about one thing - I would have thought that running a 1:1 divider would allow the lowest tRD value as the two clocks are running at the same speed. Data should be able to be passed between the two buses without delay, whereas if the memory clock is running faster, it might need the delay to prevent 'overlapping' with the previous data transfer. However, according to the formula (and indeed a couple of quick tests confirm it), a 1:1 divider is actually the worst for tRD, the wider the ratio the better.

    Any ideas why this is?

    Great article anyways!

    Dale
    Reply
  • Maxxxx - Sunday, June 14, 2009 - link

    Yes, you are right about 1:1 divider and tRD. This article incorrectly describes work of the memory controller. Reply
  • geok1ng - Sunday, August 03, 2008 - link

    I have a P5WDH a 975X mobo. if i am understand correctly this chipset would apply the TRD from the basic table and my best options would be a Trd of 6 or 8? Is there any way of knowing what Trd number is being applyed? I am running an E4300 at 9x329Mhz and 4 1GB sticks of DDR1100 at 987Mhz Cas 5/6/6/18/21. everest gave me a memo latency of 55.5ns ( better than quite a few 45nm/P35 owners here). Any use going for the Trd 6 option (8:5 divider i believe) since neither my my mobo can reach FSB above 1333 nor my memo can go above 1000mhz and keeping CAS 5 ( it is rated at cas 5/7/7/25/32 but the P5WDH just cant go above 5/6/6/6/18/21). Using a 8:5 divider bellow 1000Mhz memory mean runing the CPU at 2,7Ghz...and using crazy DDR/MCH voltages. Reply
  • Sarsbaby - Wednesday, July 16, 2008 - link

    Wow, I just learned alot, I think.
    Very nice article! Well written and presented.
    I'll definately have to clear my CMOS for this one.
    Reply
  • jamstan - Friday, July 11, 2008 - link

    I would have liked a review of the board itself instead of page after page about clocking. I have this board ready to build my rig today with 2 4870s in CF and I would have liked to read about the crossfire setup, the sound card, etc instead of page after page about clocking. Althou informative I feel the review should have remained focused on the board itself and the clocking crap should have been in a different article. It's a nice feature on this board but its like doing a review of a Corvette and wasting the whole review on its transmission. Reply
  • Sarsbaby - Wednesday, July 16, 2008 - link

    You know, this is only one of many reviews for this board, and only one of many on this forum.
    Try some more searching, and maybe educate yourself more before calling most of this article "Crap". This is probably one of the most useful articles on this motherboard I have found.
    With all these new options open to ROG owners, i'm glad someone is taking the time to explain what they mean and why we have paid for them.

    And have you ever re-built a transmision? Or tuned an LSD? It's alot more complicated than you think apparently.
    Reply
  • DEFLORATOR - Tuesday, May 27, 2008 - link

    Why does the author says that the board revision is 1.03G while it is clearly seen on the photoes that it's 1.00G (imprinted between PCIe slots)? Please owners of the board confirm that 1.00G is the latest revision of Rampage Formula (gonna order that tomorrow) Reply
  • viqarqadir2 - Monday, April 21, 2008 - link

    Hello
    I am very new to this stuff and havent been able to make a lot of sense of the configurations despite reading the article several times.

    I have the following setup:
    Intel Q6600@2.4 Ghertz
    Kingston Ram 8500 (5.5.15) 1X4 Gigs - 1066Mh
    XFX Geforce 8800GTX XXX edition. (I guess this doesnt matter)

    What sort of configuration should I apply?

    I also wanted to know if someone has had problems with the MB temperature and whether 51 Centigrades after playing STALKER for about one hour is normal. Any help will be appreciated.
    Reply
  • viqarqadir2 - Thursday, April 24, 2008 - link

    hmm...
    I dont know if I've done something wrong but for some reason, 3dMark is showing the memory at 1.9 Ghertz. It's a DDR2 rated at 1066 and I am running it at (according to my calculation) 1000.
    The pc feels ridiculously fast. All MB lights are green. The 3d Mark app is giving a score of about 11000. I am not a techie but is it possible that I have discovered something? Is there a way to post screenshots in the comments area?
    Reply

Log in

Don't have an account? Sign up now