Merging CPUs and GPUs
AMD has already outlined the beginning of its CPU/GPU merger strategy in a little product called Fusion. While quite bullish on Fusion, AMD hasn't done a tremendous job of truly explaining the importance of Fusion. Fusion, if you haven't heard, is AMD's first single chip CPU/GPU solution due out sometime in the 2008 - 2009 timeframe. Widely expected to be two individual die on a single package, the first incarnation of Fusion will simply be a more power efficient version of a platform with integrated graphics. Integrated graphics is nothing to get excited about, but it is what follows as manufacturing technology and processor architectures evolve that is really interesting.
AMD views the Fusion progression as three discrete steps:
Today we have a CPU and a GPU separated by an external bus, with the two being quite independent. The CPU does what it does best, and the GPU helps out wherever it can. Step 1, is what AMD is calling integration, and it is what we can expect in the first Fusion product due out in 2008 - 2009. The CPU and GPU are simply placed next to one another and there's minor leverage of that relationship, mostly from a cost and power efficiency standpoint.
Step 2, which AMD calls optimization, gets a bit more interesting. Parts of the CPU can be shared by the GPU and vice versa. There's not a deep level of integration, but it begins the transition to the most important step - exploitation.
The final step in the evolution of Fusion is where the CPU and GPU are truly integrated, and the GPU is accessed by user mode instructions just like the CPU. You can expect to talk to the GPU via extensions to the x86 ISA, and the GPU will have its own register file (much like FP and integer units each have their own register files). Elements of the architecture will be shared, especially things like the cache hierarchy, which will prove useful when running applications that require both CPU and GPU power.
The GPU could easily be integrated onto a single die as a separate core behind a shared L3 cache. For example, if you look at the current Barcelona architecture you have four homogenous cores behind a shared L3 cache and memory controller; simply swap one of those cores with a GPU core and you've got an idea of what one of these chips could look like. Instructions that can only be processed by the specialized core will be dispatched directly to it, while instructions better suited for other cores will be sent to them. There would have to be a bit of front end logic to manage all of this, but it's easily done.
AMD went as far as to say that the next stage in the development of x86 is the heterogeneous processing era. AMD's Phil Hester stated plainly that by the end of the decade, homogeneous multi-core becomes increasingly inadequate. The groundwork for the heterogeneous processing era (multiple cores on chip each with a different purpose) will be laid in the next 2 - 4 years, with true heterogeneous computing coming after 2010.
It's not just about combining the CPU and GPU as we know them; it's also about adding other types of processors and specialized hardware. You may remember that Intel made some similar statements a few IDFs ago, but not nearly as boldly as AMD given that Intel doesn't have nearly as strong of a graphics core to begin integrating. The xPUs listed in the diagram above could easily be things like H.264 encode/decode engines, network accelerators, virus scan accelerators, or any other type of accelerator that's deemed necessary for the target market.
In a sense, AMD's approach is much like that of the Cell processor, the difference being that with AMD's direction the end result would be a much more powerful sequential core combined with a true graphics core. Cell was very much ahead of its time, and by the time AMD and Intel can bring similar solutions to the market the entire industry will be far more ready for them than it was for Cell. Not to mention that treating everything as extensions to the x86 ISA makes programming far easier than with Cell.
Where does AMD's Torrenza fall into play? If you'll remember, Torrenza is AMD's platform approach to dealing with different types of processors in an AMD system. The idea being that external accelerators could simply pop into an AMD processor socket and communicate with the rest of the system over Hyper Transport. Torrenza actually works quite well with AMD's Fusion strategy, because it allows for other accelerators (xPUs if you will) to be put in AMD systems without having to integrate the functionality on AMD's processor die. If there's enough demand in the market, AMD can eventually integrate the functionality on die, but until then Torrenza offers a low cost in-between solution.
AMD drew the parallel to the 287/387 floating point coprocessor socket that was present on 286/386 motherboards. Only around 2 - 3% of 286 owners bought a 287 FPU, while around 10 - 20% of 386 owners bought a 387 FPU; when the 486 was designed it simply made sense to integrate the functionality of the FPU into all models because the demand from users and developers was there. Torrenza would allow the same sort of migration to occur from external socket to eventual die integration if it makes sense, for any sort of processor.
AMD has already outlined the beginning of its CPU/GPU merger strategy in a little product called Fusion. While quite bullish on Fusion, AMD hasn't done a tremendous job of truly explaining the importance of Fusion. Fusion, if you haven't heard, is AMD's first single chip CPU/GPU solution due out sometime in the 2008 - 2009 timeframe. Widely expected to be two individual die on a single package, the first incarnation of Fusion will simply be a more power efficient version of a platform with integrated graphics. Integrated graphics is nothing to get excited about, but it is what follows as manufacturing technology and processor architectures evolve that is really interesting.
AMD views the Fusion progression as three discrete steps:
Today we have a CPU and a GPU separated by an external bus, with the two being quite independent. The CPU does what it does best, and the GPU helps out wherever it can. Step 1, is what AMD is calling integration, and it is what we can expect in the first Fusion product due out in 2008 - 2009. The CPU and GPU are simply placed next to one another and there's minor leverage of that relationship, mostly from a cost and power efficiency standpoint.
Step 2, which AMD calls optimization, gets a bit more interesting. Parts of the CPU can be shared by the GPU and vice versa. There's not a deep level of integration, but it begins the transition to the most important step - exploitation.
The final step in the evolution of Fusion is where the CPU and GPU are truly integrated, and the GPU is accessed by user mode instructions just like the CPU. You can expect to talk to the GPU via extensions to the x86 ISA, and the GPU will have its own register file (much like FP and integer units each have their own register files). Elements of the architecture will be shared, especially things like the cache hierarchy, which will prove useful when running applications that require both CPU and GPU power.
The GPU could easily be integrated onto a single die as a separate core behind a shared L3 cache. For example, if you look at the current Barcelona architecture you have four homogenous cores behind a shared L3 cache and memory controller; simply swap one of those cores with a GPU core and you've got an idea of what one of these chips could look like. Instructions that can only be processed by the specialized core will be dispatched directly to it, while instructions better suited for other cores will be sent to them. There would have to be a bit of front end logic to manage all of this, but it's easily done.
AMD went as far as to say that the next stage in the development of x86 is the heterogeneous processing era. AMD's Phil Hester stated plainly that by the end of the decade, homogeneous multi-core becomes increasingly inadequate. The groundwork for the heterogeneous processing era (multiple cores on chip each with a different purpose) will be laid in the next 2 - 4 years, with true heterogeneous computing coming after 2010.
It's not just about combining the CPU and GPU as we know them; it's also about adding other types of processors and specialized hardware. You may remember that Intel made some similar statements a few IDFs ago, but not nearly as boldly as AMD given that Intel doesn't have nearly as strong of a graphics core to begin integrating. The xPUs listed in the diagram above could easily be things like H.264 encode/decode engines, network accelerators, virus scan accelerators, or any other type of accelerator that's deemed necessary for the target market.
In a sense, AMD's approach is much like that of the Cell processor, the difference being that with AMD's direction the end result would be a much more powerful sequential core combined with a true graphics core. Cell was very much ahead of its time, and by the time AMD and Intel can bring similar solutions to the market the entire industry will be far more ready for them than it was for Cell. Not to mention that treating everything as extensions to the x86 ISA makes programming far easier than with Cell.
Where does AMD's Torrenza fall into play? If you'll remember, Torrenza is AMD's platform approach to dealing with different types of processors in an AMD system. The idea being that external accelerators could simply pop into an AMD processor socket and communicate with the rest of the system over Hyper Transport. Torrenza actually works quite well with AMD's Fusion strategy, because it allows for other accelerators (xPUs if you will) to be put in AMD systems without having to integrate the functionality on AMD's processor die. If there's enough demand in the market, AMD can eventually integrate the functionality on die, but until then Torrenza offers a low cost in-between solution.
AMD drew the parallel to the 287/387 floating point coprocessor socket that was present on 286/386 motherboards. Only around 2 - 3% of 286 owners bought a 287 FPU, while around 10 - 20% of 386 owners bought a 387 FPU; when the 486 was designed it simply made sense to integrate the functionality of the FPU into all models because the demand from users and developers was there. Torrenza would allow the same sort of migration to occur from external socket to eventual die integration if it makes sense, for any sort of processor.
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osalcido - Sunday, May 13, 2007 - link
Like they price gouged when X2s were introduced?If so, I hope Intel kills them off. If I'm gonna get gouged I'd rather it be by a monopoly so maybe the government will do something about it
Spoelie - Sunday, May 13, 2007 - link
there was really no price gouging as far as I know. AMD was capacity constrained, they were selling every possible cpu they could make at those prices, and even had backorders. I remember that around the summer of 2005, they had sold out their capacity for at least the next 6 months.It would be absolutely economically INSANE to lower prices under those conditions. If you sell every single cpu you can make, you're not gonna lower prices to increase demand..
But well yeah, around feb 2006 came the news of core 2 ;)
Kougar - Sunday, May 13, 2007 - link
I'm not sure, but whatever image protection you are using to protect direct image linking seems to now be breaking ALL images in Opera. I have had problems in the past regarding Anandtech review/article images, but chalked it up to a browser setting I could not pin down.So far it still only happens with Anandtech images, and after a full reinstall of Opera 9.20 I still can't see any images or any image placeholders in this article. I did not know there was even any images until I got to page 7 where the captions were left hanging in midpage. I really hate having to switch to IE7 to read articles, so if this can be easily fixed I'd very much appreciate it. Thanks.
If it helps any, if I am looking for it I can sometimes spot an image start to load, before it is near instantly removed from the page and the text reshuffled to fill the empty void.
bigbrent88 - Sunday, May 13, 2007 - link
I know this may be a simple way to look at AMD's Fusion and future chips based on that idea, but isn't this close to what the Cell already is. Imagine you could remake the cell with a current C2D(using current power leader) and include more, better SPE's with something like HT in AM2 and all of this is on a smaller die than you could do now. Would that not be the basic first step they are going to take? Many have said the Cell is ahead of its time and I also agree that some design elements are inhibiting its overall power, but the success of Folding shows what the Cells processing can do in these types of environments and thats what AMD is looking at in the near term.I just can't wait to drop my x2 3800 and get a good upgrade to go along with that new DX10 card sometime in the next year. Bring it AMD!
noxipoo - Friday, May 11, 2007 - link
get everything in focus for christ sakes.plonk420 - Friday, May 11, 2007 - link
it's interesting how many commercial programs aren't multithreaded. take a look at this year's Breakpoint demos/intros, and just about ALL the top 3 or 5 (or more) take advantage of 2 cores (i don't have more than 2 to know if they would make use of the extra ones or not). check out the Breakpoint 2007 entries at pouet.net and fire something up with a Task Manager open on a second monitor and see for yourself ;)OcHungry - Friday, May 11, 2007 - link
From the tone of your article I have no doubt AMD is about to put Intel where it belongs, in the so so technology arena with lots of marketing maneuvering to sell inferior products. I like the Jetliner graph where the air bus is taking off at a steep angle and the other small jet is going horizontal w/a little inclination. That says it all, and how the 2 (Intel and AMD) are perceived in the technology world.It’s like this: Intel refines the same old, but AMD is into innovation and new things. Good for AMD, it’s about time. The heteroggenenous architecture, the fusion, and Torenza, are where computing technology should be heading, and AMD is taking the lead, as always. I live in Austin, TX, and have a few friends working @ AMD and tell me: buy AMD shares as much as you can, because good things are about to explode and neither Intel, nor Nvidia can catch up to it, ever.
sandpa - Friday, May 11, 2007 - link
actually they are asking everybody to buy AMD shares so that they can sell off their worthless AMD stock for a better price :) dont listen to them ... they are not your friends. No one will be able to catch up with AMD "ever" ??? yeah keep dreaming fanboi!OcHungry - Friday, May 11, 2007 - link
Yeah right. Tell that to Fidelity who bought more of AMD shares lately (13% total).And I guess the rise in price yesterday and today were meaningless?
Intel marketing thugs are at work, no change there.
http://www.theinquirer.net/default.aspx?article=39...">http://www.theinquirer.net/default.aspx?article=39...
yyrkoon - Friday, May 11, 2007 - link
This is exactly what I was thinking while reading, then I ran into the above paragraph, and my suspicions were 'reinforced'. However, if this is the case, I can not help but wonder what will happen to nVidia. Will nVidia end up like 3dfx ? I guess only time will tell. There is a potential problem I am seeing here however, if we do finally get integrated graphics on the CPU die, what next ? Audio ? After a while this could be a problem for the consumer base, and may ressemble something along the lines of how a lot of Linux users view Microsoft, wit htheir 'Monopoly'. In the end, 'we' lose flexability, and possibly the freedom to choose what software that will actually run on our hardware. This is not to say, I buy into this beleif 100%, but it is a distinct possibility.
Apparently Intel suspects something is going on as well. One look at the current prices of the E6600 C2D should confirm this, as its currently half the price of what it was a month ago. Unless, there is something else I am missing, but the Extreme CPUs still seem to be hovering around ~$1000 usd.
I am very pleased to hear that AMD is continuing support for Socket AM2. It was my previous belief, that they were going to phase this socket out, for a newer socket, and if this was the case a few months ago, I am glad that they listen, and learn. Releasing products that underperform the competition is one thing, but alienating your user base is another . . . That being said, I really do hope that Barcelona/K10/whatever the hell the official name is, will give Intel some very tight competition (at least).
I can completely understand why AMD is being tight lipped, I have suspected the reasons why for some time now, and personally, I believe it to be in their best interrest to remain doing so. And yes, it may reflect badly on AMD at this point in time, but what would you preffer ? Intel learning your secretes, and thus rendering them moot, or a few 'whinners', such as ourselves, not knowing what is going on ? They are doing the right thing by them, and that is all that matters. No one, including Intel 'fanboys' want AMD to go under, they may think so, until it really does happen, then they are locked into whatever Intel deems nessisary, which is bad for everyone.
Now, if AMD could come up with something similar to vPro/AMT, or perhaps AMD/Intel could make a remote administration (BIOS, or similr level) 'Standard', I think I would be happy, for at least a little while . . .