JEDEC made two important announcements about the future of DRAM and non-volatile DIMMs for servers last week. Development of both is proceeding as planned and JEDEC intends to preview them in the middle of this year and publish the final specifications sometimes in 2018.

Traditionally each new successive DRAM memory standard aims for consistent jumps: doubling the bandwidth per pin, reducing power consumption by dropping Vdd/Vddq voltage, and increasing the maximum capacity of memory ICs (integrated circuits). DDR5 will follow this trend and JEDEC last week confirmed that it would double the bandwidth and density over DDR4, improve performance, and power efficiency.

Given that official DDR4 standard covers chips with up to 16 Gb capacity and with up to 2133-3200 MT/s data rate per pin, doubling that means 32 Gb ICs with up to 4266-6400 MT/s data rate per pin. If DDR5 sustains 64-bit interface for memory modules, we will see single-sided 32 GB DDR5-6400 DIMMs with 51.2 GB/s bandwidth in the DDR5 era. Speaking of modules, it is interesting to note that among other things DDR5 promises “a more user-friendly interface”, which probably means a new retention mechanism or increased design configurability.


Samsung's DDR4 memory modules. Image for illustrative purposes only.

Part of the DDR5 specification will be improved channel use and efficiency. Virtually all modern random access memory sub-systems are single-channel, dual-channel or multi-channel, but actual memory bandwidth of such systems does not increase linearly with the increase of the number of channels (i.e., channel utilization decreases). Part of the problem is the fact that host cores fight for DRAM bandwidth, and memory scheduling is a challenge for CPU and SoC developers. Right now we do not know how DRAM developers at JEDEC plan to address the memory channel efficiency problem on the specification level, but if they manage to even partly solve the problem, that will be a good news. Host cores will continue to fight for bandwidth and memory scheduling will remain important, but if channel utilization increases it could mean both performance and power advantages. Keep in mind that additional memory channels mean additional DRAM ICs and a significant increase in power consumption, which is important for mobile DRAM subsystems, but it is also very important for servers.

JEDEC plans to disclose more information about the DDR5 specification at its Server Forum event in Santa Clara on June 19, 2017, and then publish the spec in 2018. It is noteworthy that JEDEC published the DDR4 specification in September 2012, whereas large DRAM makers released samples of their DDR4 chips/modules a little before that. Eventually, Intel launched the world’s first DDR4-supporting platforms in 2014, two years after the standard was finalized. If DDR5 follows the same path, we will see systems using the new type of DRAM in 2020 or 2021.

Another specification that JEDEC plans to finalize in 2018 is the NVDIMM-P that will enable high-capacity memory modules featuring persistent memory (flash, 3D XPoint, new types of storage-class memory, etc.) and DRAM. The capacity of today’s NVDIMM-Ns is limited to the capacity of regular server DRAM modules, but the NVDIMM-P promises to change that and increase capacities of modules to hundreds of GBs or even to TBs. The NVDIMM-P is currently a work in progress and we are going to learn more about the tech in June.

Related Reading

Sources of images: SNIA, Samsung

Source: JEDEC

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  • Xajel - Monday, April 03, 2017 - link

    Good, an open standard against Intel's proprietary Optane solutions.. if that later is actually going to be a consumer friendly solution.. I don't see it with their current products, even a little bit peaking into future.. the advantage that Optane bring is very minimal for 90% of consumers compared to NVMe. So it will still need more time to prove it self...

    BTW, Intel announced Optane products based on 3D X-Point... but Micron did not release any thing yet.. are they planning actually to do ?
    Reply
  • Yojimbo - Monday, April 03, 2017 - link

    Intel and Micron plan to use 3D XPoint in two different forms. One is through the PCI express bus as a mass storage device, which is what you see with the Optane drives. They use the standard NVMe interface, I believe. The other way is through the memory bus as an NVDIMM, which is what this JEDEC standard addresses. 3D XPoint is proprietary to Intel and Micron no matter how it's attached to the system. But other non-volatile memory solutions can similarly use NVMe or these NVDIMM-Ps or both. It works the exact same way with NAND flash. There are NAND flash NVMe SSDs and NAND flash NVDIMMs. Reply
  • Xajel - Monday, April 03, 2017 - link

    I know all that, and that consumer Optane drives ( bootable, more capacity like 512GB ) will mostly come in 2.5" ( U.2 interface ) & PCIe cards. as the current density of 3D XPoint chips does not allow such capacity in M.2 modules.

    The thing I was saying is the current implementation, where Optane will be able to act like a system RAM, in this case only Intel's latest platform support it. but having an industry standard with JEDEC means it's not limited to Intel platform. AMD might also make use of such approach with future platforms...

    The questions is, well Intel's first implementation of the NVDIMM be complaint to the final JEDEC standard or they will need to change things later.
    Reply
  • ImSpartacus - Monday, April 03, 2017 - link

    Oh god, so you're telling me u.2 won't be dying any time soon?

    FML

    I'm tired of this confusingly unorganized storage market.
    Reply
  • Xajel - Tuesday, April 04, 2017 - link

    Nope, Intel is a big promoter to U.2, and AFAIK they make over 90% of U.2 drives, but on market maybe they're alone.

    U.2 still better than SATA Express IMO. and it might be the best option for any 2.5" PCIe SSD.

    The only problem with U.2 is it's port on motherboard is different than the one in the drive. and it's a little bit more expensive than SATA Express. but the bulkiness of SATA Express is just doesn't worth it.
    Reply
  • andychow - Monday, April 10, 2017 - link

    SATA Express has been around forever and there has never been a drive for it. The connector is junk imo. Thunderbolt isn't bulky and it's fast, they can make a fast small connector to replace SATA-3. Reply
  • Yojimbo - Monday, April 03, 2017 - link

    Was it ever in much doubt whether 3D XPoint would be available on non-Intel platforms? As long as the technology were successful I would assume Micron would work towards putting 3D XPoint on OpenPOWER and any other platform that customers were interested in. Reply
  • Sarah Terra - Friday, April 07, 2017 - link

    optane is fail, dead in the water, its just turbocache 2.0.I wont be investing a dime into it ever, I'm very happy to wait for a real non volatile high speed storage media appears to permanently replace ram, SSD's, caches, and everything else in between. Reply
  • Yojimbo - Monday, April 03, 2017 - link

    Oh, as far as Micron, they plan to release 3D XPoint products under the QuantX brand name later in 2017. They seem to expect "break out" revenues from 3D XPoint products starting in 2019. Reply
  • vFunct - Monday, April 03, 2017 - link

    I really don't see the DIMM standard being relevant for consumer applications in 5-10 years. What's going to happen is that CPUs are going to come with memory in HBM packages. Intel is working on partial silicon interposer substrates that don't have the size limits of current HBM packages, and so we will eventually be buying Core i7 parts with 64GB of memory included. And, perhaps with 1 TB of Optane memory as well.

    The DIMM standard is only going to matter for servers that need 16-64TB of memory.
    Reply

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