Original Link: https://www.anandtech.com/show/1533



Dissecting code names seems like a full time job for some of us lately.  Fortunately, a full time job pays for my schooling so here are the breakdown of Intel's newest code names, and what they mean to us.

Hopefully you have kept up with the last few articles from Anand and Jarred concerning dual core product SKUs and general Intel roadmaps.  Of course, processors are only half of Intel's business - core logic composes the less glamorous side of Intel.  Although we have been talking about Glenwood and Lakeport for several months now, today we are going to look at Intel's new server chipsets, Blackford and Greencreek.

Greencreek (also known as Greencreek 2S - 2Socket) is slated as the Tumwater (E7525) replacement, while Blackford is the Lindenhurst (E7520) replacement.  In short, the two chipsets are nearly identical with Blackford serving as the high end version of the platform. The large news here is Intel's push for dual front side buses.  The latest Intel roadmaps thoroughly describe dual independent buses as:
               "New 2S platform architecture for improved performance"
2S, of course, denotes 2 Sockets.  With advances towards dual core processing, the idea of independent buses per socket probably indicates the best approach possible for Intel to de-saturate the front side bus.  We already know that Twin Castle will utilize independent memory controllers, and with Greencreek/Blackford showing up soon after with dedicated paths to their memory controllers, we could see large boosts in memory IO.  The roadmap indicates Twin Castle will utilize multiple buses in later revisions as well.

Aside from dual buses, the new processors incorporate some other features as well, the largest being fully buffered DIMMs (FBD or FB-DIMM).  The Memory Forum actually has a very concise IDF presentation with the memory architecture explained here.  The apparent problem with DDR2 DIMMs (particularly when there are 8 or more) is that the signal gets very dirty.  FB-DIMM attempts to solve this by placing a memory buffer directly on the DIMM itself.  FB-DIMM aims to replace registered DIMMs, although the significant complexity of FBD will surely make it extremely expensive. 

Blackford/Greencreek also boast "enhanced storage controllers" (most likely SATA-II) and EM64T compatibility as well.  Below we have a small cross section on various chipset names and the details we know about them.

  • Blackford: Lindenhurst successor for the Dempsey dual core processor. EM64T.  Dual Independent FSB.  FB-DIMM Support.  Scheduled for H1'06.
  • Greencreek: Tumwater successor for the Dempsey dual core processor.  Will utilize two sockets.  EM64T. Dual Independent FSB.  FB-DIMM Support.  Scheduled for H1'06.
  • Twin Castle: 4 Socket platform for Xeon MP.  Utilizes a dedicated memory controller.  Will probably support dual core processors with a future revision that supports multiple (or at least dual FSB).  Scheduled for Q1'06.
  • Alviso: Intel's 915P chipset for the next generation Centrino platform.  Scheduled for Q1'05.
  • Sonoma: Next generation Centrino platform including Alviso.  Scheduled for Q1'05.
  • Napa: Successor for Sonoma designed for dual core mobility processors.  Adds DDR2-667.   Scheduled for Q1'06.
  • Lakeport: 915P successor, supports 1066FSB, more PCIe lanes and 667MHz DDR-2, AMT and more EIST revisions.  Scheduled for Q2'05.
  • Glenwood: 925XE successor.  Supports everything Lakeport does but should also include ECC capability.  Scheduled for launch with Lakeport.
  • Tekoa:  Intel's next generation gigabit Ethernet chipset for deployment with Intel core logic.
  • Mukilteo: Uniprocessor workstation release for the Glenwood/Lakeport generation.  Supports EM64T. 
  • ICH7: Next generation south bridge.  Comes in several different versions including a "Raid" version, DH (Ditigal Home), DO (Digital Office), DE (Digital Enterprise) versions as well. 


Recently we have seen motherboard manufacturers disclose Pentium M platforms for the desktop.  As more and more people start adopting higher clocked Pentium Ms over Celerons and Pentium 4s, don't be surprised to hear a lot more people giving attention to all things Centrino.



Next Generation Processors

Unfortunately, next generation processor architecture seems more amok than anything we could have imagined (to be fair, this goes for AMD too, but that is a different article).  There are rumors of a next generation NetBurst processor, dubbed Cedarmill (or Cedar Mill), floating around.  Sources tell us that Cedarmill looks like Iriwindale/Prescott 2M on the 1066FSB, although the Intel roadmaps indicate absolutely nothing about it.  We have also heard rumors that it could be a 90nm part shipping in very late 2005, or perhaps a 65nm part shipping in 2006.  However, the roadmaps make zero mention of this chip, so take those rumors with a grain of salt for now.

Intel has dual core SKUs slated for every facet of its processor technology, even if just as a code name.  Before dual core we expect to see the launch of Iriwindale (Prescott 2M) - which does not seem to be much other than Xeons with 2MB L2 cache, DDR2 and EM64T - and no plans to go to 4GHz.  By the time 2006 rolls along, Intel has three server CPU code names on the table: Dempsey (Iriwindale Successor), Paxville (Cranford successor) and Tulsa (Potomac successor).  Dempsey looks like the DP/UP solution while Paxville and Tulsa are the MP solutions. 

Iriwindale, if you don't know already, is the upcoming Prescott successor.  We shouldn't really call it a successor, as Iriwindale is identical to Nocona with 2MB of L2 cache (90nm, 800MHz FSB).  However, the core does get a little freshening with EM64T integration and Enhanced Speed Step instructions.  Expect to see Iriwindale/Prescott 2M in Q1 next year, with speeds starting at 3GHz and ramping to 3.8GHz. 

After the dust settles when Iriwindale replaces Nocona, Intel has the roadmaps for Dempsey, Tulsa and Paxville laid out.  "Tulsa" and "Paxville" are fairly self explanatory; Tulsa is the Cranford/Potomac replacement, and Paxville is the eventual Tulsa successor.  There are footnotes indicating a ramp up of dual core technology for the multiprocessor (MP) market, and the dual FSB Twin Castle chipset would also designate that sort of migration.  Footnotes on the roadmap indicate both Paxville is definitely a dual core processor, although we suspect its successor Tulsa would be dual core as well.  Tulsa is the only 65nm processor mentioned on the roadmap, although we also expect Yonah (next generation Pentium M) to utilize 65nm.

Dempsey, the Iriwindale replacement, is certainly dual core (according to our roadmap).  Dempsey is slated for H1'06, somewhere just after the rumored Cedarmill launch.  

Below you can see a list of processors and some details.

  • Prescott 2M: Identical to today's Prescott with some additional features like 2MB L2 cache.  Still 800MHz FSB, 90nm process.  New features include EM64T and Enhanced Speed Step. Slated for Q1'05.
  • Iriwindale:  Prescott 2M for UP and DP servers/workstation.  Slated for Q1'05.
  • Smithfield: Dual core Desktop processor.  800MHz FSB, EM64T, Enhanced Speed Step, XD and 1MB L2 cache per core. Produced on the 90nm process.  Slated for Q3'05.
  • Dempsey: Dual Core Iriwindale replacement, nearly identical to Smithfield.  Slated for H2'05.
  • Cranford: Xeon MP CPU with 667MHz FSB, 1MB L2 cache.  Also supports XD, EM64T.  Expected Q1'05.
  • Potomac: Xeon MP CPU with 667MHz FSB with 1MB L2 and up to 8MB L3 cache.  Expected for Q2'05.
  • Paxville: Successor to Potomac/Cranford.  Expected H1'06.
  • Tulsa:  Successor to Paxville.  Expected H2'06.
  • Alviso: 90nm successor to Dothan (Pentium M).  Expected to launch Q1'05.
  • Yonah/Jonah: 65nm, dual core successor to Alviso for the Napa platform.  Expected to launch Q1'06.
  • Cedarmill: Iriwindale/Prescott 2M but with a 1066MHz FSB. Rumored for late '05 or early '06.


Some of the technologies abbreviated are also listed below.  The technologies labeled enterprise are mostly geared toward Itanium processors. 

  • EIST: Enhanced Intel Speed Step Technology; modifies the frequency on the fly to keep thermal and power consumption down.
  • Foxton Technlogy (FT): Modifies CPU frequency on the fly, sort of like EIST (enterprise)
  • DBS: Demand Based Switching; EIST for IA64 during idle time (enterprise)
  • Pellston Technology (PT): Higher system RAS via cache redundancy (enterprise)
  • Silvervale Technology (ST): Hardware virtualization (enterprise)
  • Vanderpool Technology (VT): Hardware virtualization 
  • AMT: Active Management Technology; Out of Band system management independent of operating system.
  • LaGrande Technology (LT): Hardware based security measures against software security flaws.

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