Original Link: http://www.anandtech.com/show/8382/samsung-announces-exynos-5430-first-20nm-samsung-soc

While we mentioned this in our Galaxy Alpha launch article, Samsung is finally announcing the launch of their new Exynos 5430 SoC.

The main critical upgrade that the new chips revolve around is the manufacturing process, as Samsung delivers its first 20nm SoC product and is also at the same time the first manufacturer to do so.

On the CPU side for both the 5430, things don’t change much at all from the 5420 or 5422, with only a slight frequency change to 1.8GHz for the A15 cores and 1.3GHz for the A7 cores. We expect this frequency jump to actually be used in consumer devices, unlike the 5422’s announced frequencies which were not reached in the end, being limited to 1.9GHz/1.3GHz in the G900H version of the Galaxy S5. As with the 5422, the 5430 comes fully HMP enabled.

A bigger change is that the CPU IP has been updated from the r2p4 found in previous 542X incarnations to a r3p3 core revision. This change, as discussed by Nvidia earlier in the year, should provide better clock gating and power characteristics for the CPU side of the SoC.

On the GPU side, the 5430 offers little difference from the 5422 or 5420 beyond a small frequency boost to 600MHz for the Mali T628MP6.

While this is still a planar transistor process, a few critical changes have been made that make 20nm HKMG a significant leap forward from 28nm HKMG. First, instead of a gate-first approach for the high-K metal gate formation, the gate is now the last part of the transistor to be formed. This improves performance because the characteristics of the gate are no longer affected by significant high/low temperatures during manufacturing. In addition, lower-k dielectric in the interconnect layers reduce capacitance between the metal and therefore increase maximum clock speed/performance and reduce power consumption. Finally, improved silicon straining techniques should also improve drive current in the transistors, which can drive higher performance and lower power consumption. The end-effect is that we should expect an average drop in voltage of about 125mV, and quoting Samsung, a 25% reduced power.

In terms of auxiliary IP blocks and accelerators, the Exynos 5430 offer a new HEVC (H.265) hardware decoder block, bringing its decoding capabilities on par with Qualcomm’s Snapdragon 805.

Also added is a new Cortex A5 co-processor dedicated to audio decoding called “Seiren”. Previously Samsung used a custom FPGA block called Samsung Reprogrammable Processor (SRP) for audio tasks, which seems to have been now retired. The new subsystem allows for processing of all audio-related tasks, which ranges from decoding of simple MP3 streams to DTS or Dolby DS1 audio codecs, sample rate conversion and band equalization. It also provides the chip with voice capabilities such as voice recognition and voice triggered device wakeup without external DSPs. Samsung actually published a whitepaper on this feature back in January, but we didn’t yet know which SoC it was addressing until now.

The ISP is similar to the one offered in the 5422, which included a clocking redesign and a new dedicated voltage plane.

The memory subsystem remains the same, maintaining the 2x32-bit LPDDR3 interface, able to sustain frequencies up to 2133MHz or 17GB/s. We don’t expect any changes in the L2 cache sizes, and as such, they remain the same 2MB for the A15 cluster and 512KB for the A7 cluster.

The Galaxy Alpha will be the first device to ship with this new SoC, in early September of this year.

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