Athlon 64 Revision E: Unofficial DDR500 Support
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AMD’s 90nm Athlon 64s have been almost everything that the enthusiast community has wanted them to be. Being little more than a die shrink, the 90nm chips are cooler, can run faster, and are cheaper to make than their 130nm counterparts. But the improvements didn’t stop with the move to 90nm. More recently, AMD has released their Revision E 90nm Athlon 64 cores, which featured a number of small improvements.
One of the biggest improvements to Rev E on paper was the added support for SSE3 instructions, originally introduced on Intel’s 90nm Prescott based Pentium 4. When the Rev E cores had first arrived on the scene, we took a look at the performance improvements offered by SSE3 support and came up empty handed .
There were a number of other improvements made to the Rev E core, including an updated memory controller - boasting support for mismatched DIMM sizes per channel, improved memory access performance for integrated graphics cores and a few other performance tweaks that AMD hasn’t gone into much detail about.
One such barely mentioned improvement was support for a handful of new memory dividers. With an on-die memory controller, AMD has to be particularly careful about adopting new memory technologies, as the wrong choice could leave them with a bunch of CPUs that are basically un-sellable. Over a year ago, AMD had been talking about bringing support for faster than DDR400 speeds to the Athlon 64 - assuming JEDEC would ratify the specifications. AMD waited until the very latest possible moment to decide on whether DDR2 or a faster DDR1 memory controller would be in their future, which is why it took them until just a few months ago to really start talking about DDR2 support. Potentially as a backup plan, the Rev E chips include unofficial support for memory faster than DDR400, without overclocking the Hyper Transport bus.
AMD obviously didn’t speak much about support for these higher speed DRAM options, mainly because they are not official specs, and thus, AMD doesn’t officially support them. But, the fact of the matter is that many folks have faster-than-DDR400 memory, and the new Rev E CPUs can now take advantage of that.
One of the biggest improvements to Rev E on paper was the added support for SSE3 instructions, originally introduced on Intel’s 90nm Prescott based Pentium 4. When the Rev E cores had first arrived on the scene, we took a look at the performance improvements offered by SSE3 support and came up empty handed .
There were a number of other improvements made to the Rev E core, including an updated memory controller - boasting support for mismatched DIMM sizes per channel, improved memory access performance for integrated graphics cores and a few other performance tweaks that AMD hasn’t gone into much detail about.
One such barely mentioned improvement was support for a handful of new memory dividers. With an on-die memory controller, AMD has to be particularly careful about adopting new memory technologies, as the wrong choice could leave them with a bunch of CPUs that are basically un-sellable. Over a year ago, AMD had been talking about bringing support for faster than DDR400 speeds to the Athlon 64 - assuming JEDEC would ratify the specifications. AMD waited until the very latest possible moment to decide on whether DDR2 or a faster DDR1 memory controller would be in their future, which is why it took them until just a few months ago to really start talking about DDR2 support. Potentially as a backup plan, the Rev E chips include unofficial support for memory faster than DDR400, without overclocking the Hyper Transport bus.
AMD obviously didn’t speak much about support for these higher speed DRAM options, mainly because they are not official specs, and thus, AMD doesn’t officially support them. But, the fact of the matter is that many folks have faster-than-DDR400 memory, and the new Rev E CPUs can now take advantage of that.
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