JEDEC Reveals Key Aspects of DDR4

by Kristian Vättö on 8/23/2011 2:01 PM EST
POST A COMMENT

34 Comments

Back to Article

  • Andrew.a.cunningham - Tuesday, August 23, 2011 - link

    The more bandwidth the better! We're already seeing new IGPs get bottlenecked by 1333 and 1600MHz DDR3 today, and that'll only get worse as time goes on. Reply
  • DanNeely - Tuesday, August 23, 2011 - link

    It's not just IGPs. Intel needs one DDR3 memory channel per two cores. Until DDR4 hits mainstream parts are going to be limited to quad core configs. Reply
  • yelped - Tuesday, August 23, 2011 - link

    Hopefully, AMD will bundle cheap DDR4 RAM to the OEMs, so laptops with their APUs are not held back. Reply
  • Gauner - Tuesday, August 23, 2011 - link

    We still need to see chipsets that support more than 1833 bus, keep in mind that even if you have 3200Mhz memory, if the APU itself cant go any higher than... let's say 2400, it will be mostly useless.

    And sincerely, I dont se that happening soon, it's expensive to support such high buses and if AMD or intel wanted to do it, they could have done it by now with DDR3 at 2000-2133Mhz.
    Reply
  • Kristian Vättö - Tuesday, August 23, 2011 - link

    Sooner or later faster buses will be supported. 2133MHz DDR3 didn't come out right after P35, it took years. The same will happen with DDR4. It will take a few years before we will see speeds close to the maximum.

    Also, there are some reports of 2133MHz support in Ivy Bridge: http://news.softpedia.com/news/Intel-Ivy-Bridge-to...
    Reply
  • iwod - Tuesday, August 23, 2011 - link

    We either need CPU to have Tri or Quad memory channel without all the MB space ( using Laptop DRAM as standard ? ) or we need a new type of Memory.

    If every node shrink means doubling of Gfx Power, the life time of memory is suppose to last 2 to 3 node shrink. and if we count 1.5x the bandwidth for doubling the Gfx power, that means we need at least 3x memory bandwidth.

    Quad Channel is something CPU maker dont want to go because of the wasted Die Space.

    So are we stuck for the next few years starved by memory bandwidth?
    Reply
  • Kristian Vättö - Wednesday, August 24, 2011 - link

    Memory bandwidth is not the bottleneck. dGPUs have their own VRAM which is often faster than regular RAM. Hence the need for RAM isn't that huge and tests show that faster RAM provides no better performance

    http://www.anandtech.com/show/4503/sandy-bridge-me...
    Reply
  • darckhart - Wednesday, August 24, 2011 - link

    the speed doesn't even make sense because most ddr3 that claims to hit 1866+ are not at 1.5V. What's the whole point if you have to crank it to 1.65V or higher? especially if you intend on populating all the slots. Reply
  • sangyup81 - Tuesday, August 23, 2011 - link

    isn't one module one channel pretty much what unganged mode does anyways? Reply
  • Iketh - Wednesday, August 24, 2011 - link

    No, it's each channel running independently from the other so a core doesn't have to share a channel with another core. You're not limited to 2 modules when running unganged, right?......... Reply
  • gevorg - Tuesday, August 23, 2011 - link

    What about CAS latencies? Are they going to increase like they did from DDR2 to DDR3? Reply
  • Kristian Vättö - Tuesday, August 23, 2011 - link

    SemiAccurate is claiming CL12 as the standard for 2133MHz DDR4

    http://semiaccurate.com/2010/08/16/ddr4-not-expect...
    Reply
  • DanNeely - Tuesday, August 23, 2011 - link

    Yup. DDRN+1 is implemented primarily by doubling the bus speed and doubling the number of chips on a dimm accessed in parallel. SDR ram accessed on chip at a time. DDR1 2 chips, DDR2 4 chips, DDR3 8 chips, DDR4 will be 16 chips. I don't know if this will mean the end of 8 chip modules (especially in lower capacities), or if they'll start making chips that are functionally equivalent to dual core designs with 2 IO channels instead of only one. Reply
  • FaaR - Wednesday, August 24, 2011 - link

    Dan, you're very confused.

    All current PC RAM (and all past too, except DRDRAM) is accessed in parallel: all chips in one bank (one side of the DIMM) make up the full width of the data bus.

    Only DRDRAM accessed memory one chip at a time, because it was a serial setup.
    Reply
  • fhaddad78 - Tuesday, August 23, 2011 - link

    I'm not a hardware guru or anything and a lot of this stuff is over my head, but I kind of understand why memory architecture needs to change as processors become faster. I know there is a relationship and that is why for example Intel Core series cpus use DDR and why we don't see much benefit from memory speeds beyond DDR3 18xx. Ok, i'm rambling here...

    As the subject reads: DDR5

    I noticed that AMD GPUs use DDR5 and my question is why do CPUs not use DDR5 yet? Is that memory different than the DDR3 memory used in today's cpus?

    Thanks for sharing some insight into this mysterious and explainable phenomenon regarding memory specifications.
    Reply
  • fhaddad78 - Tuesday, August 23, 2011 - link

    No edit button...

    ... cpus use DDR and ...

    Should read:

    ... cpus use DDR3 and ...
    Reply
  • LordanSS - Tuesday, August 23, 2011 - link

    AMD (and nVidia's GPUs) use GDDR5, not DDR5. It's a completely different beast, heh. =) Reply
  • fhaddad78 - Tuesday, August 23, 2011 - link

    Ah. This definitely has an affect on my question. (: Reply
  • cosmoanu87 - Wednesday, September 28, 2011 - link

    yep and GDDR5 is a variant of DDR3 whereas GDDR3,4 were variants of DDR2, so essentially the same base spec Reply
  • DanNeely - Tuesday, August 23, 2011 - link

    GDDR has split from main stream DDR standards and undergoes more frequent, smaller updates. Among the advantages they have is that since the chips are soldered onto the GPUs and aren't user swappable they don't have to as extensive validation to make sure every part combination works. One major functional difference is that (in most cases) each GDDR chip is connected directly to the GPU by a dedicated instead of being glued together into dimms that share a connection to the CPU. Reply
  • EJ257 - Tuesday, August 23, 2011 - link

    If that is the case, does each chip or combination of chips service one single SP on the GPU specifically? If that chip goes bad, does that SP now perform more poorly because it just lost some of it's RAM? Reply
  • Ryan Smith - Tuesday, August 23, 2011 - link

    No. A memory crossbar means that any unit has access to any region of RAM. And if a chip goes bad the video card is rendered inoperable; it has no way of compensating for a missing/damaged memory module. Reply
  • fhaddad78 - Tuesday, August 23, 2011 - link

    Ryan Smith.... Are you from the Matrix? Reply
  • silverblue - Wednesday, August 24, 2011 - link

    What, by having the surname Smith? Reply
  • Beenthere - Tuesday, August 23, 2011 - link

    The current 1.35V DDR3 is good. Higher frequencies don't add any tangible performance benefit with the current bandwidth so it really matters not if it's 1600 or 2000 MHz. AMD's new Zambezi will allow the use of LV DDR3 with a default speed of 1866 MHz. Reply
  • FaaR - Wednesday, August 24, 2011 - link

    Buddy, I'm glad we have you here with us, telling us what we don't need, now or in the future. :-P

    Clearly this is a standard that's supposed to last for a number of years ahead of where we are now. With integrated graphics processors in our CPUs, bandwidth will become a more and more pressing concern as time goes on.
    Reply
  • Ethaniel - Tuesday, August 23, 2011 - link

    ... not compatible with DDR3 When you think about retrocompatibility, they don´t. Reply
  • Andrew.a.cunningham - Tuesday, August 23, 2011 - link

    It makes sense, really - it's hard to build a memory controller with support for a standard that doesn't exist yet. :-) Reply
  • cosmoanu87 - Wednesday, September 28, 2011 - link

    More like they want us to dump old stuff and buy new modules :D what better way than to make DDR3 incompatible? :) Reply
  • fhaddad78 - Tuesday, August 23, 2011 - link

    Why is that person holding the memory module like that? I thought it's not a good idea to put your fingers on the contact end of the chip. Clearly this violates Article 15, Section 9, Paragraph 37, Line 12 of the DDR4 handling specification.

    That person is "holding it wrong."
    Reply
  • Iketh - Thursday, August 25, 2011 - link

    Sounds like it's about time to start referring to memory frequencies as 2.1GHz, 3.2GHz, etc. Reply
  • soliozuz - Saturday, September 17, 2011 - link

    I'm still running a laptop that only supports DDR2 (Santa Rosa), technology is moving at such a rapid pace it's insane. Reply
  • DDR4 - Wednesday, November 07, 2012 - link

    They're trying to tell you that you get better rigs for less gigs. Reply

Log in

Don't have an account? Sign up now