In 2015 AMD will launch project SkyBridge, a pair of pin-compatible ARM and x86 based SoCs. Leveraging next generation Puma+ x86 cores or ARM's Cortex A57 cores, these SoCs form the foundation of the next phase in AMD's evolution where ARM and x86 are treated like equal class citizens. As I mentioned in today's post however, both of these designs really aim at the lower end of the performance segment. To address a higher performance market, AMD is doing what many ARM partners have done and is leveraging an ARM architecture license to design their own microarchitecture. 

In 2016 AMD will release its first custom 64-bit ARMv8 CPU core, codenamed K12. Jim Keller is leading the team that is designing the K12, as well as a corresponding new 64-bit x86 design. AMD is pretty quiet about K12 details at this point given how far away it is. Given the timing I'm assuming we're talking about a 14/16nm FinFET SoC. On the slide above we see that AMD is not only targeting servers and embedded markets, but also ultra low power client devices for its 64-bit ARM designs (presumably notebooks, chromebooks, tablets). AMD has shied away from playing in the phone market directly, but it could conceivably play in that space with its semi-custom business (offering just a CPU/GPU core with other IP). Update: AMD added that server, embedded and semi-custom markets are obvious targets for K12. 

There's also this discussion of modularity, treating both ARM and x86 cores as IP modules rather than discrete designs. AMD continues to have a lot of expertise in SoC design, all it really needs is a focus on improving single threaded performance. I can only hope (assume?) that K12 won't be Bulldozer-like and will hopefully prioritize single threaded performance. It's important to point out that there hasn't been a single reference to the Bulldozer family of CPU cores in any of these announcements either...

Update: Jim Keller added some details on K12. He referenced AMD's knowledge of doing high frequency designs as well as "extending the range" that ARM is in. Keller also mentioned he told his team to take the best of the big and little cores that AMD presently makes in putting together this design. 

POST A COMMENT

21 Comments

View All Comments

  • The Hardcard - Monday, May 12, 2014 - link

    I don't see how the Bulldozer design inhibits single threaded performance in and of itself. Boosting instruction throughput requires prioritizing it during core design, and allocating the resources needed.

    It would seem to be about the same kind of work and amount of work regardless of the core. I figured that AMD didn't have the resources to pursue all their goals and maybe gambled that certain efforts would work out.
    Reply

Log in

Don't have an account? Sign up now