Supermicro's Latest Twin

We got a sneak peak at the Supermicro's brand new Twin 2U server: the SYS-6027TR-D71FRF. The 2U chassis has two dual Xeon E5 based servers inside that are fed by two fully redundant 1280W PSUs (at 180-230V, 1000W at 100-140V).

The two servers are held in place using screwless clips.

You get the density of a 1U server without needing four PSUs for redundancy and without the very power hungry 40 mm fans. Indeed, using only 2 PSUs and 80 mm fans should save quite a bit of power compared to 2 1U servers. Last time we measured, the Twin servers consumed 6% less power than the best 1U servers on the market.

At the same time, the expansion capabilities are better: you get two full height and one half height PCIe 3.0 (!) x16 (x8 electrical) slots. The only disadvantage is that you only get 4 DIMM slots per CPU, which generally limits each server to about 128 GB of RAM (8 x 16 GB) unless you go with expensive 32 GB LR-DIMMS for a total of 256 GB. Therefore this server is probably better for HPC workloads than for memory intensive virtualization and database applications.

This new Twin server also features FDR InfiniBand interconnect technology, good for 56Gb/s (!) low latency network connections with an X4 cable. This should work especially well in tandem with Intel Data Direct I/O technology, where packets are directly transferred into the Last Level Cache (LLC) instead of being DMAed to the memory. This is something we'll be investigating in a later article.

The New Xeon Platform Benchmarking Configuration
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  • Kjella - Tuesday, March 06, 2012 - link

    Of course, I'm guessing Q1 2013 before we'll see those but we already know from all the leaked SB -> IB details roughly what SB-Xeon to IB-Xeon will be like. All AMD has on their roadmap for 2013 is the "Abu Dhabi" with the "Piledriver" core promising 10-15% performance boost but still on 32nm. So you can see the punch coming a year away, but I don't think AMD has the capability to do anything about it. Reply
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  • BSMonitor - Tuesday, March 06, 2012 - link

    My question as well.

    What is the Intel roadmap for Ivy Bridge in this arena. Would be the same timeframe as IVB-E I would guess.

    Wondering if my Intel dividends will pile up enough for me to afford one! Haha
    Reply
  • devdeepc - Friday, September 02, 2016 - link

    Based on the paper specs, AMD's 6276, 6274 and Intel's 2640 and 2630 are in a neck-and-neck race. Reply
  • fredisdead - Saturday, April 07, 2012 - link

    From the 'article' .....

    'The Opteron might also have a role in the low end, price sensitive HPC market, where it still performs very well. It won't have much of chance in the high end clustered one as Intel has the faster and more power efficient PCIe interface'

    Well, if that's the case, why exactly would AMD be scoring so many design wins with Interlagos. Including this one ...

    http://www.pcmag.com/article2/0,2817,2394515,00.as...

    http://www.eweek.com/c/a/IT-Infrastructure/Cray-Ti...

    U think those guys at Cray were going for low performance ? In fact, seems like AMD has being rather cleaning up in the HPC market since the arrival of Interlagos. And the markets have picked up on it, AMD stock is thru the roof since the start of the year. Or just see how many Intel processors occupy the the top 10 supercomputers on the planet. Nuff said ...
    Reply
  • iwod - Tuesday, March 06, 2012 - link

    And not find a single comment on how and why "making this CPU quite a challenge, even for Intel."

    In my view It seems Intel is now using Server Market and Atom / SoC for their 32nm capacity when ever they introduce a new node in consumer products.
    Reply
  • extide - Tuesday, March 06, 2012 - link

    A large part of Intel's long-term strategies include keeping the fabs occupied.

    Latest gen fabs (currently 22nm) produce bleeding edge cpu's, usually in the consumer space

    One gen back (32nm) produces server/workstation/mobile cpus

    two gens back (45nm) produces other things like chipsets, and possibly itanium chips

    even three gens back (65nm) probably still exists in some places making some chipsets as well.

    Their goal is to as much use as possible from their investment into building the fabs themselves.
    Reply
  • Kevin G - Tuesday, March 06, 2012 - link

    65 nm is still used for Itanium, though the Poulson chip is due sometime this year made on a 32 nm process. If you want to compare die sizes, the 65 nm Tukwila design is 699 mm^2 in size.

    The main reason why 32 nm Sandybridge-E has been released so close to the release of 22 nm Ivy Bridge chips is that the initial Ivy Bridge chips are consumer centric. Intel performs additional testing on its server centric designs. This is particularly true as Sandybridge-E is not just replacing the dual socket Westmere-EP chips but some of the quad socket Westmere-EX market. RAS demands jump from going from dual to quad socket and that is reflected in additional testing. Implementing PCI-E 3.0 and QPI 1.1 also contributed to the time for additional testing.

    Though you are correct that Intel does uses its older process nodes for various chipsets and IO chips. However, as Intel is marching toward SoC designs, the actual utility of keeping these older process nodes in action is decreasing.
    Reply
  • meloz - Tuesday, March 06, 2012 - link

    >And not find a single comment on how and why "making this CPU quite a challenge, even for Intel."

    Because it is such a massive die? 416 mm²? Large dies usually have a lower yield, and Intel's 32 nm process is still cutting edge (if only for a few more weeks, heh).

    Look at how TSMC, Global Flounderings et al are struggling. An impressive achievement by Intel.
    Reply
  • MrSpadge - Tuesday, March 06, 2012 - link

    A significant amount of functionality has been added to the SB cores, and Intel can't afford mistakes in such CPUs. Reply

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