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Partially Resident Textures: Not Your Father’s Megatexture

John Carmack’s id Software may not be the engine licensing powerhouse it was back in the Quake 3 days, but that hasn’t changed the revolutionary nature of his engine designs. The reason we bring this up is because there’s a great deal of GPU technology that can be directly mapped to concepts Carmack first implemented. For id Tech 4 Carmack implemented shadow volume technology, which was then first implemented in hardware by NVIDIA as their UltraShadow technology, and has since then been implemented in a number of GPUs. For id Tech 5 the trend has continued, now with AMD doing a hardware implementation of a Carmack inspired technology.

Among the features added to Graphics Core Next that were explicitly for gaming, the final feature was Partially Resident Textures, which many of you are probably more familiar with in concept as Carmack’s MegaTexture technology. The concept behind PRT/Megatexture is that rather than being treated as singular entities, due to their size textures should be broken down into smaller tiles, and then the tiles can be used as necessary. If a complete texture isn’t needed, then rather than loading the entire texture only the relevant tiles can be loaded while the irrelevant tiles can be skipped or loaded at a low quality. Ultimately this technology is designed to improve texture streaming by streaming tiles instead of whole textures, reducing the amount of unnecessary texture data that is streamed.

Currently MegaTexture does this entirely in software using existing OpenGL 3.2 APIs, but AMD believes that more next-generation game engines will use this type of texturing technology. Which makes it something worth targeting, as if they can implement it faster in hardware and get developers to use it, then it will improve game performance on their cards. Again this is similar to volume shadows, where hardware implementations sped up the process.

In order to implement this in hardware AMD has to handle two things: texture conversion, and cache management. With texture conversion, textures need to be read and broken up into tiles; AMD is going with a texture format agnostic method here that can simply chunk textures as they stand, keeping the resulting tiles in the same format. For AMD’s technology each tile will be 64KB, which for an uncompressed 32bit texture would be enough room for a 128 x 128 chunk.

The second aspect of PRT is managing the tiles. In essence PRT reduces local video memory to a very large cache, where tiles are mapped/pinned as necessary and then evicted as per the cache rules, and elsewhere the hardware handles page/tile translation should a tile not already be in the cache. Large tomes have been written on caching methods, and this aspect is of particular interest to AMD because what they learn about caching here they can apply to graphical workloads (i.e. professional) and not just gaming.

To that end AMD put together a technology demo for PRT based on Per-Face Texture Mapping (PTEX), a Disney-developed texture mapping technique that maps textures to polygons in a 1:1 ratio. Disney uses this technique for production rendering, as by constraining textures to a single polygon they don’t have to deal with any complexities that arise as a result of mapping a texture over multiple polygons. In the case of AMD’s demo it not only benefits for the reasons that Disney uses it, but also because when combined with tessellation it trivializes vector displacement, making art generation for tessellated games much easier to create. Finally, PRT fits into all of this by improving the efficiency of accessing and storing the Ptex texture chunks.

Wrapping things up, for the time being while Southern Islands will bring hardware support for PRT software support will remain limited. As D3D is not normally extensible it’s really only possible to easily access the feature from other APIs (e.g. OpenGL), which when it comes to games is going to greatly limit the adoption of the technology. AMD of course is working on the issue, but there are few ways around D3D’s tight restrictions on non-standard features.

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  • GTVic - Thursday, December 22, 2011 - link

    The first Fermi version they demo'd was a mock-up held together with wood screws. That is not a good launch... Reply
  • RussianSensation - Thursday, December 22, 2011 - link

    And the real launch version produced Tessellation performance that took HD7970 to pass, had compute performance that HD7970 can barely best today, had Mega Texture support that HD7970 just added now 2 years later, had scalar SIMD architecture that took AMD 2 years to release. Reply
  • Scali - Friday, December 23, 2011 - link

    HD7970 doesn't actually surpass Fermi's tessellation, apart from tessellation factors 10 and below:
    http://www.pcgameshardware.de/aid,860536/Test-Rade...
    From factor 11 to 64, Fermi still reigns supreme.

    (This is with AMD's SubD11 sample from the DirectX 11 SDK).
    Reply
  • Scali - Friday, December 23, 2011 - link

    Uhhh no. They demo'ed a real Fermi obviously.
    It was just a development board, which didn't exactly look pretty, and was not in any way representative of the card that would be available to end-users.
    So they made a mock-up to show what a retail Fermi WOULD look like, once it hits the stores.
    Which is common practice anyway in the industry.
    Reply
  • fllib19554 - Thursday, January 12, 2012 - link

    off yourself cretin. Reply
  • futurepastnow - Thursday, December 22, 2011 - link

    You misspelled "impressive." Reply
  • slayernine - Thursday, December 22, 2011 - link

    What Wreckage really meant to say was that it was disappointing for nVidia to get pummelled so thoroughly. Reply
  • unaligned - Friday, December 23, 2011 - link

    A year old card pummeled by the newest technology? I would hope so. Reply
  • MagickMan - Thursday, December 22, 2011 - link

    Go shoot yourself in the face, troll. Reply
  • rs2 - Thursday, December 22, 2011 - link

    Yes, yes. 4+ billion transistors on a single chip is not impressive at all. Why, it's not even one transistor for every person on the planet yet. Reply

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