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A Quick Refresher, Cont

Having established what’s bad about VLIW as a compute architecture, let’s discuss what makes a good compute architecture. The most fundamental aspect of compute is that developers want stable and predictable performance, something that VLIW didn’t lend itself to because it was dependency limited. Architectures that can’t work around dependencies will see their performance vary due to those dependencies. Consequently, if you want an architecture with stable performance that’s going to be good for compute workloads then you want an architecture that isn’t impacted by dependencies.

Ultimately dependencies and ILP go hand-in-hand. If you can extract ILP from a workload, then your architecture is by definition bursty. An architecture that can’t extract ILP may not be able to achieve the same level of peak performance, but it will not burst and hence it will be more consistent. This is the guiding principle behind NVIDIA’s Fermi architecture; GF100/GF110 have no ability to extract ILP, and developers love it for that reason.

So with those design goals in mind, let’s talk GCN.

VLIW is a traditional and well proven design for parallel processing. But it is not the only traditional and well proven design for parallel processing. For GCN AMD will be replacing VLIW with what’s fundamentally a Single Instruction Multiple Data (SIMD) vector architecture (note: technically VLIW is a subset of SIMD, but for the purposes of this refresher we’re considering them to be different).


A Single GCN SIMD

At the most fundamental level AMD is still using simple ALUs, just like Cayman before it. In GCN these ALUs are organized into a single SIMD unit, the smallest unit of work for GCN. A SIMD is composed of 16 of these ALUs, along with a 64KB register file for the SIMDs to keep data in.

Above the individual SIMD we have a Compute Unit, the smallest fully independent functional unit. A CU is composed of 4 SIMD units, a hardware scheduler, a branch unit, L1 cache, a local date share, 4 texture units (each with 4 texture fetch load/store units), and a special scalar unit. The scalar unit is responsible for all of the arithmetic operations the simple ALUs can’t do or won’t do efficiently, such as conditional statements (if/then) and transcendental operations.

Because the smallest unit of work is the SIMD and a CU has 4 SIMDs, a CU works on 4 different wavefronts at once. As wavefronts are still 64 operations wide, each cycle a SIMD will complete ¼ of the operations on their respective wavefront, and after 4 cycles the current instruction for the active wavefront is completed.

Cayman by comparison would attempt to execute multiple instructions from the same wavefront in parallel, rather than executing a single instruction from multiple wavefronts. This is where Cayman got bursty – if the instructions were in any way dependent, Cayman would have to let some of its ALUs go idle. GCN on the other hand does not face this issue, because each SIMD handles single instructions from different wavefronts they are in no way attempting to take advantage of ILP, and their performance will be very consistent.


Wavefront Execution Example: SIMD vs. VLIW. Not To Scale - Wavefront Size 16

There are other aspects of GCN that influence its performance – the scalar unit plays a huge part – but in comparison to Cayman, this is the single biggest difference. By not taking advantage of ILP, but instead taking advantage of Thread Level Parallism (TLP) in the form of executing more wavefronts at once, GCN will be able to deliver high compute performance and to do so consistently.

Bringing this all together, to make a complete GPU a number of these GCN CUs will be combined with the rest of the parts we’re accustomed to seeing on a GPU. A frontend is responsible for feeding the GPU, as it contains both the command processors (ACEs) responsible for feeding the CUs and the geometry engines responsible for geometry setup. Meanwhile coming after the CUs will be the ROPs that handle the actual render operations, the L2 cache, the memory controllers, and the various fixed function controllers such as the display controllers, PCIe bus controllers, Universal Video Decoder, and Video Codec Engine.

At the end of the day if AMD has done their homework GCN should significantly improve compute performance relative to VLIW4 while gaming performance should be just as good. Gaming shader operations will execute across the CUs in a much different manner than they did across VLIW, but they should do so at a similar speed. And for games that use compute shaders, they should directly benefit from the compute improvements. It’s by building out a GPU in this manner that AMD can make an architecture that’s significantly better at compute without sacrificing gaming performance, and this is why the resulting GCN architecture is balanced for both compute and graphics.

A Quick Refresher: Graphics Core Next Building Tahiti & the Southern Islands
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  • GTVic - Thursday, December 22, 2011 - link

    The first Fermi version they demo'd was a mock-up held together with wood screws. That is not a good launch... Reply
  • RussianSensation - Thursday, December 22, 2011 - link

    And the real launch version produced Tessellation performance that took HD7970 to pass, had compute performance that HD7970 can barely best today, had Mega Texture support that HD7970 just added now 2 years later, had scalar SIMD architecture that took AMD 2 years to release. Reply
  • Scali - Friday, December 23, 2011 - link

    HD7970 doesn't actually surpass Fermi's tessellation, apart from tessellation factors 10 and below:
    http://www.pcgameshardware.de/aid,860536/Test-Rade...
    From factor 11 to 64, Fermi still reigns supreme.

    (This is with AMD's SubD11 sample from the DirectX 11 SDK).
    Reply
  • Scali - Friday, December 23, 2011 - link

    Uhhh no. They demo'ed a real Fermi obviously.
    It was just a development board, which didn't exactly look pretty, and was not in any way representative of the card that would be available to end-users.
    So they made a mock-up to show what a retail Fermi WOULD look like, once it hits the stores.
    Which is common practice anyway in the industry.
    Reply
  • fllib19554 - Thursday, January 12, 2012 - link

    off yourself cretin. Reply
  • futurepastnow - Thursday, December 22, 2011 - link

    You misspelled "impressive." Reply
  • slayernine - Thursday, December 22, 2011 - link

    What Wreckage really meant to say was that it was disappointing for nVidia to get pummelled so thoroughly. Reply
  • unaligned - Friday, December 23, 2011 - link

    A year old card pummeled by the newest technology? I would hope so. Reply
  • MagickMan - Thursday, December 22, 2011 - link

    Go shoot yourself in the face, troll. Reply
  • rs2 - Thursday, December 22, 2011 - link

    Yes, yes. 4+ billion transistors on a single chip is not impressive at all. Why, it's not even one transistor for every person on the planet yet. Reply

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