We just started testing SSDs based on IMFT 25nm NAND Flash and look at what Intel/Micron just announced? The first 8GB MLC NAND device built on a 20nm process. This is obviously an announcement of pre-production silicon, it’ll take IMFT until the second half of this year (at least) to start shipping production quality 20nm NAND. 


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MFT 20nm 8GB NAND, 118mm2

 
At 50nm IMFT NAND was good for 10,000 program/erase cycles (rated, not actual). The move to 34nm dropped that to 3000 - 5000 program erase cycles, a value that was maintained with the move to 25nm. I asked Micron how long NAND will last at 20nm and was told that p/e cycles are comparable to where 25nm was at a similar point in its development cycle. Micron expects quality to ramp over time and ultimately hit a similar point to existing 25nm NAND, which is good for controller manufacturers as it means any ECC/NAND redundancy efforts they have already implemented should support the new 20nm product.
 
An 8GB 2-bit-per-cell MLC NAND device built at 20nm has a die area of 118mm2, down from 167mm2 at 25nm. A single 8GB NAND device wasn’t built at 34nm. 
 

 
IMFT is on a 15 - 18 month process cadence, meaning this transition was of course planned for in advance. The first 20nm NAND is being manufactured at the IMFT Fab in Lehi, Utah, which is currently producing 25nm NAND. Some equipment upgrades are necessary to support 20nm. IMFT will also transition its fabs in Manassas, VA and Singapore to 20nm at a later point.
 
For consumers there’s an obvious win. We need smaller transistor geometries to reduce the cost of NAND, which ultimately reduces the cost of SSDs. The days of 50% annual price reductions are over however, expect to see a conservative 20 - 30% drop in price for SSDs that use 20nm NAND over 25nm NAND.
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  • ProDigit - Thursday, April 14, 2011 - link

    Could not agree more!
    I'd like to see drives hitting the $1/GB for SSD, though I doubt that's going to happen any time soon!
    Just the simple reduction in read latency, and the optimized garbage collection (increasing also IOPS,by introducing delayed writes), even without higher than HD burst transfer speeds, is already enough for many.

    Many could not care less if their harddrive can be written to at 500MB/s or 550MB/s.
    Most people will not come close to these results anyways, and most people buy the lowest priced SSD's because the other ones are unaffordable. Thus having a 16, 20, 24, 32, 40, 60, 64, or 80GB SSD can be written full in a few seconds. Burst rates are kind of a non factor.
    I'd rather have a drive that has high iops and 300MB/s burst than one with low iops and high burst rates (in the likes of 500MB/s).

    I rather have an affordable 40GB Kingston drive as my OS drive, than an unaffordable $1000 SSD and stuck with a monthly payment plan!
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  • Metaluna - Thursday, April 14, 2011 - link

    Wow I guess I haven't been paying attention. What happened to all the doom & gloom I was reading a year or so ago about how 25nm MLC was going to only have about 1000 write/erase cycles, and it was only downhill after that? Now I read that we can expect 34nm endurance levels all the way down to 20nm, which is great news. Reply
  • phaxmohdem - Thursday, April 14, 2011 - link

    I was also under the impression that smaller nodes = less write cycles, but that controller voodoo can compensate for that by wear-leveling to the point that 1000 write cycles would last 100+ years under normal write-usage conditions.

    I suppose they could also tweak the composition of the material that holds the charge to reduce electron leakage too.

    However its accomplished, as long as the drive has a long serviceable lifespan, it's all good in da hood.
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  • L. - Friday, April 15, 2011 - link

    I believe there is a wrong assumption somewhere about the write cycles.

    The common belief is that NAND gets worse because of size, which seems illogical (do your CPU's get worse because of size ? not at all - but on the other hand you cannot allow for mistakes in CPU manufacture else it just doesn't work - unlike NAND).

    I'm under the impression that for the same quality of NAND you have the same number of write cycles, regardless of the process.

    Which would lead to the conclusion that those bad write cycle numbers are only related to the following fact : it takes time to reach the same level of quality on a new process.

    In other words:
    t0 34nm NAND = 10k writes
    t1 34nm NAND = 15k writes
    t1 25nm NAND = 5k writes
    t2 25nm NAND = 10k writes
    t2 20nm NAND = 5k writes

    and so on, just like early 40nm nVidia yields were a huge failure while now everybody uses 40nm without much problems.

    Quite clearly, you can easily use moore's law again and just say that in 10 years we'll have 2nm NAND that has 10k writes no problem (careful, random numbers inserted - although it can't be far from the truth).
    Reply

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