Intel Processor Power Delivery Guidelines (Cont'd)

In this next case we eliminate Vdroop altogether and examine the chaos that ensues. As illustrated by our model, removing Vdroop does nothing to reduce the magnitude of the idle to full-load transient but does increase the settling time as the VRM must recover to a higher final regulation voltage. As in the case of no Voffset, it is possible to exceed the maximum allowable CPU voltage (VID). Clearly, removing Vdroop gains us nothing and only serves to create problems that are more serious.



No Vdroop means the VRM circuit must work harder at maintaining a constant voltage

So what happens when we remove both Voffset and Vdroop? The answer is simple - bad things. Although the difference between the maximum positive and negative peak overshoot are the same, severe violations to the CPU VID limit occur. If you're asking yourself what's the problem with this, consider the case of a CPU VID of 1.60000V - because the user feels this is the absolute maximum CPU voltage that they will allow. Just how high do you think CPU voltage will go after leaving a heavy load condition? We can't be sure without knowing more of the details, but we can certainly conclude that it will be well in excess of 1.6V. If you've ever run a benchmark only to have your system crash right as it finishes then you have experienced the consequences of this poor setup.



The user gives up all control over the CPU supply voltage with no Voffset or Vdroop

Finally, let's take one last real-world look at the consequences of removing Vdroop. ASUS' implementation of this feature, labeled as Load Line Calibration and included with their latest line of motherboards, is particularly worthy of our attention for a number of reasons. The first is that setting lower voltages with this option enabled actually results in a condition in which the CPU voltage under load is higher than the idle voltage. Imagine our confusion as we desperately struggle to understand why our system is Prime95 stable for days yet continues to crash under absolutely no load. What's more, in spite of the absence of droop and for reasons unknown, enabling this feature artificially raises our CPU's minimum stable core voltage at 4.0GHz from 1.28V to about 1.33V. As a result, our system uses more power under load than is otherwise necessary. Our efforts to reduce our processor's supply voltage backfired - instead of lowering the system's total power consumption we managed to affect a 20W increase.


ASUS
P5E3 Deluxe - Load Line Calibration
Suffice it to say, we found it better to leave Load Line Calibration disabled

With Load Line Calibration disabled in BIOS, setting a CPU Voltage VID of 1.38750 resulted in a no-load voltage of about 1.34V and a full-load value of 1.28V. Enabling this feature and lowering the VID to 1.35000V produced a constant CPU supply voltage, regardless of load (or so it seemed), of 1.33V. Setting a lower VID resulted in a blue screen during Windows boot. Idle voltage was relatively unchanged at about 1.33-1.34V but the full-load voltage required increased by 50mV with no benefit. As you might guess, we recommend you leave this option disabled.

Hopefully we've shown you enough to understand exactly why Voffset and Vdroop are important. Please give second thought to your actions if you're in the habit of defeating these essential system safeguards.

Intel Processor Power Delivery Guidelines Testing System Stability with Prime95
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  • Lifted - Wednesday, December 19, 2007 - link

    Very impressive. Seems more like a thesis paper than a typical tech site article. While the content on AT is of a higher quality than the rest of the sites out there, I think the other authors, founder included, could learn a thing or two from an article like this. Less commentary/controversy and more quality is the way to go. Reply
  • AssBall - Wednesday, December 19, 2007 - link

    Shouldn't page 3's title be "Exlporing the limits of 45nm Halfnium"? :D

    http://www.webelements.com/webelements/elements/te...">http://www.webelements.com/webelements/elements/te...
    Reply
  • lifeguard1999 - Wednesday, December 19, 2007 - link

    "Do they worry more about the $5000-$10000 per month (or more) spent on the employee using a workstation, or the $10-$30 spent on the power for the workstation? The greater concern is often whether or not a given location has the capacity to power the workstations, not how much the power will cost."

    For High Performance Computers (HPC a.k.a. supercomputers) every little bit helps. We are not only concerned about the power from the CPU, but also the power from the little 5 Watt Ethernet port that goes unused, but consumes power. When you are talking about HPC systems, they now scale into the tens-of-thousands of CPUs. That 5 Watt Ethernet port is now a 50 KWatt problem just from the additional power required. That Problem now has to be cooled as well. More cooling requires more power. Now can your infrastructure handle the power and cooling load, or does it need to be upgraded?

    This is somewhat of a straw-man argument since most (but not all) HPC vendors know about the problem. Most HPC vendors do not include items on their systems that are not used. They know that if they want to stay in the race with their competitors that they have to meet or exceed performance benchmarks. Those performance benchmarks not only include how fast it can execute software, but also how much power and cooling and (can you guess it?) noise.

    In 2005, we started looking at what it would take to house our 2009 HPC system. In 2007, we started upgrades to be able to handle the power and cooling needed. The local power company loves us, even though they have to increase their power substation.

    Thought for the day:
    How many car batteries does it take to make a UPS for a HPC system with tens-of-thousands of CPUs?
    Reply
  • CobraT1 - Wednesday, December 19, 2007 - link

    "Thought for the day:
    How many car batteries does it take to make a UPS for a HPC system with tens-of-thousands of CPUs?"

    0.

    Car batteries are not used in neither static nor rotary UPS's.
    Reply
  • tronicson - Wednesday, December 19, 2007 - link

    this is a great article - very technical, will have to read it step by step to get it all ;-)

    but i have one question that remains for me.. how is it about electromigration with the very filigran 45nm structures? we have here new materials like the hafnium based high-k dielectricum, guess this may improove the resistance agains em... but how far may we really push this cpu until we risk very short life and destruction? intel gives a headroom until max 1.3625V .. well what can i risk to give with a good waterchill? how far can i go?

    i mean feeding a 45nm core p.ex. 1,5V is the same as giving a 65nm 1,6375! would you do that to your Q6600?
    Reply
  • eilersr - Wednesday, December 19, 2007 - link

    Electromigration is an effect usually seen in the interconnect, not in the gate stack. It occurs when a wire (or material) has a high enough current density that the atoms actually move, leading to an open circuit, or in some cases, a short.

    To address your questions:
    1. The high-k dielectric in the gate stack has no effect on the resistance of the interconnect
    2. The finer features of wires on a 45nm process do have a lower threshold to electromigration effects, ie smaller wires have a lower current density they can tolerate before breaking.
    3. The effects of electromigration are fairly well understood at this point, there are all kinds of automated checks built in to the design tools before tapeout as well as very robust reliability tests performed on the chips prior to volume production to catch these types of reliability issues.
    4. The voltage a chip can tolerate is limited by a number of factors. Ignoring breakdown voltages and other effects limited by the physics of transistor operation, heat is where most OC'ers are concerned. As power dissipation is most crudely though of in terms of CVf^2 (capacitance times voltage times frequency-squared), the reduced capacitance in the gate due to the high-k dielectric does dramatically lower power power dissipation, and is well cited. The other main component in modern CPU's is the leakage, which again is helped by the high-k dielectric. So you should expect to be able to hit a bit higher voltage before hitting a thermal envelope limitation. However, the actual voltage it can tolerate is going to depend on the CPU and what corner of the process it came from. In all, there's no general guideline for what is "safe". Of course, anything over the recommended isn't "safe", but the only way you'll find out, unfortunately, is trial and error.
    Reply
  • eilersr - Wednesday, December 19, 2007 - link

    Doh! Just noticed my own mistake:
    high-k dielectric does not reduce capacitance! Quite the contrary, a high-k dielectric will have higher capacitance if the thickness is kept constant. Don't know what I was thinking.

    Regardless, the capacitance of the gate stack is a factor, as the article mentioned. I don't know how the cap of Intel's 45nm gate compares with that of their 65nm gate, but I would venture it is lower:

    1. The area of the FET's is smaller, so less W*L parallel plate cap.
    2. The thickness of the dielectric was increased. Usually this decreases cap, but the addition of high-k counter acts that. Hard to say what balance was actually achieved.

    This is just a guess, only the process engineers no for sure :)
    Reply
  • kjboughton - Wednesday, December 19, 2007 - link

    Asking how much voltage can be safetly applied to a (45nm) CPU is a lot like asking which story of a building can you jump from without the risk of breaking both legs on the landing. There's inherent risk in exceeding the manufacturer's specification at all and if you asked Intel what they thought I know exactly what they would say -- 1.3625V (or whatever the maximum rated VID value is). The fact of the matter is that choices like these can only be made by you. Personally, I feel exceeding about 1.4V with a quad 45nm CPU is a lot like beating your head against a wall, especially if your main concern is stability. My recommendation is that you stay below this value, assuming you have adequate cooling and can keep your core temperatures in check. Reply
  • renard01 - Wednesday, December 19, 2007 - link

    I just wanted to tell you that I am impressed by your article! Deep and practical at the same time.

    Go on like this.

    This is an impressive CPU!!

    regards,
    Alexander
    Reply
  • defter - Wednesday, December 19, 2007 - link

    People stop posting silly comments like: "Intel's TDP is below real power consumption, it isn't comparable to AMD's TDP".

    Here we have a 130W TDP CPU consuming 54W under load.
    Reply

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