It's surreal isn't it? Is this how you pictured it? With forty-three days left in the year, AMD is finally letting us publish benchmarks of its long awaited Phenom microprocessor. The successor to K8, AMD's most successful micro-architecture to date, and the cornerstone of AMD's desktop microprocessor business for 2008: Phenom is here.

But shouldn't there be fireworks? Where's the catchy title? The Star Wars references were bound to continue right? Why were there no benchmarks before today, why are the next several pages going to be such a surprise?

AMD had been doing such a great job of opening the kimono as its employees liked to say, giving us a great amount of detail on Barcelona, Phenom and even the company's plans for 2008 - 2009. The closer we got to Phenom's official launch however, the quieter AMD got.

We were beginning to worry, and for a while there it seemed like Phenom wouldn't even come out this year. At the last minute, plans solidified, and we received our first Socket-AM2+ motherboard, with our first official Phenom sample. What a beautiful sight it was:

These chips are launching today, with availability promised by the end of the week. Phenom today is going to be all quad-core only, you'll see dual and triple-core parts in 2008 but for now this is what we get.

The architecture remains mostly unchanged from what we've reported on in the past. This is an evolutionary upgrade to K8 and we've already dedicated many pages to explaining exactly what's new. If you need a refresher, we suggest heading back to our older articles on the topic.

The Long Road to Phenom

Ever wonder why we didn't have an early look at Phenom like we did for every Core 2 processor before the embargo lifted? Not only are CPUs scarce, but AMD itself didn't really know what would be launching until the last moment.

At first Phenom was going to launch at either 2.8GHz or 2.6GHz; then we got word that it would be either 2.6GHz or 2.4GHz. A week ago the story was 2.4GHz and lower, then a few days ago we got the final launch frequencies: 2.2GHz and 2.3GHz.

Then there's the pricing; at 2.2GHz the Phenom 9500 will set you back $251, and at 2.3GHz you'd have to part with $283 (that extra 100MHz is pricey but tastes oh so good).

The problem is, and I hate to ruin the surprise here, Phenom isn't faster than Intel's Core 2 Quad clock for clock. In other words, a 2.3GHz Phenom 9600 will set you back at least $283 and it's slower than a 2.4Ghz Core 2 Quad Q6600, which will only cost you $269. And you were wondering why this review wasn't called The Return of the Jedi.

AMD couldn't simply get enough quantities of the Phenom at 2.4GHz to have a sizable launch this year (not to mention a late discovery of a TLB error in the chips), and the company was committed to delivering Phenom before the holiday buying season as these are tough times and simply waiting to introduce its first quad-core desktop parts was just not an option. Rather than paper launch a 2.4GHz part, AMD chose to go with more modest frequencies, promising faster, more competitive chips in Q1 2008. It's not the best PR story in the world, but it's the honest truth.

Two more quad-core Phenoms will come out in Q1: the 9900 and 9700, clocked at 2.6GHz and 2.4GHz respectively. The Phenom 9900 will be priced below $350 while the 9700 will be a sub-$300 part. As you can probably guess, the introduction of those two will push down the pricing of the 9600 and 9500, which will help Phenom be a bit more competitive.

It's worth mentioning that in the 11th hour AMD decided to introduce a multiplier-unlocked version of the Phenom 9600 sometime this year that will be priced at the same $283 mark. Whether or not it's called a Black Edition is yet to be determined.

Intel Responds with...really?
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  • Kiijibari - Monday, November 19, 2007 - link

    quote:

    Looking at the multi-threaded results we see that AMD does gain some ground, but the standings remain unchanged: Intel can't be beat. We can actually answer one more question using the Cinebench results, and that is whether or not AMD's "true" quad-core (as in four cores on a single die) actually has a tangible performance advantage to Intel's quad-core (two dual-core die on a single package).

    If we look at the improvement these chips get from running the multi-threaded benchmark, all of the Phenom cores go up in performance by around 3.79x, while all the Intel processors improve by around 3.53x. There's a definite scaling advantage (~7%), but it's not enough to overcome the inherent architectural advantages of the Core 2 processors.
    Overall the article is good, but the above statement is not true, there are no "inherent architectural advantages of the Core 2" there is just a CPU that is fed with Core2 optimized Code (SSE128, etc.) and another CPU that is fed with K7 optimized code in the best case (no SSE128).
    Thus, if you are running cinebench, you should definitely buy a Core2 CPU, but you cannot draw the conclusion that Core2 has architectural advantages. Maybe the other programs suffer also from that code problem, but it can just be proofed for cinebench:
    http://www.maxon.net/pages/download/cinebenchtech_...">http://www.maxon.net/pages/download/cinebenchtech_...

    It would be interesting, if you could contact Maxon and ask if they are working on K10 optimizations.

    Anyways Intel would be in lead, with 45nm they could easily launch a 4 GHz part, but that is not even needed, as AMD just got 2.3 GHz. Disappointing indeed ...

    cheers

    Kiijibari
    Reply
  • TA152H - Monday, November 19, 2007 - link

    You haven't got a clue what you're talking about. The Core 2 and K9 (I'm not buying this is a K10, I think the benchmarks prove it's a dog. Besides, why skip a number?) are internally quite different. To say one does not have inherent advantages over the other is incredibly ill-informed. They each have advantages, it's just that Intel's tend to matter more. For example, if you are running x87 based software, the K9 is your pooch of choice. But who cares about this now? Why did AMD allocate so many resources to an obsolete instruction set (it's not even part of x86-64)? They should have killed it and saved the transistors, but they don't have the design resources. The big advantage Intel has is scheduling; it has memory disambiguation, whereas the K9 is stuck at a P6 level of scheduling loads after stores. It's a huge advantage. The whole internal architecture is different, it's very easy to understand why each would possess different performance characteristics.

    Software efficiency can make a difference, but your language thing is totally inappropriate. They are both being fed the same instructions for most applications, and the K9 gets raped. Now, before you whine to the moon about how it's Intel optimized, maybe you should think about how well the P8 (or P6++ if you prefer) did when it came out initially. Certainly, even you can understand it did not have optimizations, yet easily outperformed the K8 to a point where it became obvious it was obsolete. So, tell us about how optimizations for the Core 2 made it so vastly superior, OK?

    The reality is, the P6 was ALWAYS better than the K7. When the K7 came out, it was slightly faster (mainly because of the memory bandwidth), but considering the power use and size, it was generally an inferior processor. The Coppermine proved to be a terrific processor and Tualatin was even better. When Intel moved it to the Pentium M line and finally increased the bandwidth, AMD could never compete in the mobile space. Face it, the K7 sucked, the K8 was dreadful, and the only reason either were successful was because the P7 was arguably the worst processor ever made and sold in any numbers. It was mind-boggling bad, and incredibly got worse with the Prescott. The K8 was the death of AMD, it didn't advance the processor design enough to compete with a good design, it was just better than a very poor one. When I saw the K8, I figured AMD was doomed, but the P7 only got worse so I ended up being wrong. Now Intel is back to the P6 derived cores, and AMD simply can not compete. It's not about optimizations, they simply don't have the design talent or resources, or the manufacturing. It's not about them not understanding something, or some weird conspiracy. It's like a mouse fighting a lion. It's OK when the lion is asleep or sick, but when it wakes up, you can't really blame the mouse for getting eaten. It never had a chance. AMD has NO CHANCE against a healthy, well-functioning Intel. They never have. They can thrive only when Intel makes egregious mistakes. Superior design, and soon the superiority of their Hafnium based manufacturing will create such a delta for AMD, they need to look for a buyer before they go belly-up.

    To put it all in perspective, this new release is supposed to be AMD's leapfrog over Intel, until Intel can release the Nehalem. If they were competitive companies, that is how it would play out. Instead, it's an absolute blowout for Intel. On the release of the new AMD chips, the disparity between the two companies is the greatest it has ever been since the Pentium Pro was pitted against the 486 from AMD. AMD can improve performance though, I think it is clear the cache arrangement is very far from optimal, and can be improved significantly. The clock speeds will certainly go up quickly as well. But even with this, they will end up being slower clock normalized for most apps, and use much more power. And then, the few advantages they have go away with Nehalem. It's just going to get ugly.

    AMD has returned to it's well-established role as a bottom feeding catfish. It can suck up all the waste Intel leaves it, but as a competitive company, it's over. It's been that way for a year and it's only getting worse.

    Their only hope is IBM buys them. Combined they would have the ability to compete with Intel. After all, the Power 6 blows away the Core 2 and Itanium 2. AMD as an independent company makes no sense. IBM/AMD makes a lot of sense. Maybe Sun will buy the AMD corpse, but that makes less sense than IBM. It makes more sense than AMD alone though.

    Is it a coincidence AMD is looking to open a fab in upstate New York? I hope not.
    Reply
  • strikeback03 - Tuesday, November 20, 2007 - link

    Didn't Anandtech report that K9 was the name of an architecture they worked on for a while but gave up on? Reply
  • sprockkets - Tuesday, November 20, 2007 - link

    AMD had their improvements, but you are generally right, but not about IBM.

    Remember the days that IBM had the Cyrix processors? You know, the one with model numbers? Where did that go? They went to plucky VIA. So, IBM ditched their x86 business; what makes me think they can compete now?

    Well, that is what you get if you are Intel: Have multiple teams work on processor designs, just in case one sucks.

    Yet, what I always say I will say again, the vast majority of people who need a computer can have their fill with the lowly D201GLY2 board. For those who need gaming or the Aeroglass stuff, you can have a cheap AMD/nVIdia 7025 system.

    As it is painfully clear now, AMD should never have done a native quad core for the desktop. Maybe for servers.
    Reply
  • JumpingJack - Monday, November 19, 2007 - link

    Yet another claiming the "software optimization theory."

    Architectural superiority has been demonstrated in the ability to run code faster.
    Reply
  • Proteusza - Monday, November 19, 2007 - link

    Actually, there is every possibility that he is right.

    First off, how much do you know about instruction sets and compilers? I'm going to assume nothing. If you do know something, then consider this for the edification of other readers.

    Compilers take code written in one language and produce an output in another. Specifically, compilers take code written in a language that can be easily understood by humans (ie C++) and output code that a machine can understand (machine code, or bytecode in the case of a JVM).

    Now, the problem with enhanced instruction sets, like SSE4, and SSE4.1 and SSE4a, is that they require compiler support. Imagine an instruction set as a vocabulary. And compilers are the programs that produce books, using a specified vocabulary. Now, the simple truth is that Intel makes extra effort to get its vocabulary into use. Thus, Cinebench was most likely compiled with Intel's latest vocabulary, and not AMD's.

    So, part of the K10 update was that it allowed SSE operations to be completed much faster, and I'm presuming this requires the use of its new instruction set. If so, that means that Cinebench was basically running in K8 mode.

    Not so far fetched, just means AMD has to make sure people update their code. The instruction set issue is another reason why RISC CPU's are generally simpler and faster.
    Reply
  • JumpingJack - Monday, November 19, 2007 - link

    Look... it is code, that is all ... AMD and Intel are both designing to the same code base, run it on one... then run it on the other... which is faster?

    Architectural jargon of IMC and victim L3 cache, and x-bit look up ... if it doesn't work it doesn't work.
    Reply
  • Kiijibari - Monday, November 19, 2007 - link

    Lol .. just code ... imagine a guy talking in a south west Chinese dialect to you. You do not understand anything ? Well .. it is just a language ... ;-)

    No offense intended: Please do some read up on compliers and programming languages .. it is interesting :)

    cheers

    Kiiji
    Reply
  • Brunnis - Monday, November 19, 2007 - link

    Acutally, there shouldn't be any code modifications needed to make use of the new SSE functionality. The difference is internal to the CPU, meaning that it now processes SSE instructions without splitting them. The instructions used are the same as before.

    That said, there may be untapped potential in the CPU that can be uncovered by the use of a different compiler (due to other reasons). Though, as far as I know, Intel compilers often produce faster code even for AMD CPUs...

    About the "architectural advantage" Anand mentioned: Of course the Core 2 has an architectural advantage. It's pretty obvious from the fact that it performs faster, clock-for-clock, in almost all cases while having much higher frequency potential. Not even AMD's integrated memory controller can raise the computational efficiency of their CPU enough to really challenge Intel. AMD may have a more elegant external design and interface to the rest of the system (native quad, HyperTransport, integrated memory controller), but Intel obviously has the more refined internal design. Sadly for AMD, a computational advantage seems to weigh heavier than a neat system/core interface in this case.
    Reply
  • Kiijibari - Monday, November 19, 2007 - link

    quote:

    Acutally, there shouldn't be any code modifications needed to make use of the new SSE functionality. The difference is internal to the CPU, meaning that it now processes SSE instructions without splitting them. The instructions used are the same as before.
    Yes I know what you mean, the SSE instructions are the same, they are just executed faster (in 1 clock compared to 2 clocks before). That is correct, however I wonder how much code is out there that is compiled with the old Intel compilers until 9.X.

    The problem with these compilers were, that they did not executed the SSE2 codepath on AMD chips, even if the CPU would have been capable of executing it. Instead a slower FPU code is used for AMD K8s.

    The newest Intel 10 Compilers have now new compiler flags that can generate SSE2 code for non-intel CPUs, however I did not have seen benches of these so far.

    Even the M$ Compiler had some nasty SSE disable "features":
    http://einstein.phys.uwm.edu/forum_thread.php?id=6...">http://einstein.phys.uwm.edu/forum_thread.php?id=6...

    All in all, I guess there are a lot of programs out there that disable SSE on AMD CPUs :( Therefore a plain compile test of several open-sorce prgorams with gcc / Sun / Pathscale compilers would be nice. Intel CPUs could be benched with Intel compiler, too, any CPU should gets it best code.

    cheers

    Kiiji
    Reply

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