It's surreal isn't it? Is this how you pictured it? With forty-three days left in the year, AMD is finally letting us publish benchmarks of its long awaited Phenom microprocessor. The successor to K8, AMD's most successful micro-architecture to date, and the cornerstone of AMD's desktop microprocessor business for 2008: Phenom is here.

But shouldn't there be fireworks? Where's the catchy title? The Star Wars references were bound to continue right? Why were there no benchmarks before today, why are the next several pages going to be such a surprise?

AMD had been doing such a great job of opening the kimono as its employees liked to say, giving us a great amount of detail on Barcelona, Phenom and even the company's plans for 2008 - 2009. The closer we got to Phenom's official launch however, the quieter AMD got.

We were beginning to worry, and for a while there it seemed like Phenom wouldn't even come out this year. At the last minute, plans solidified, and we received our first Socket-AM2+ motherboard, with our first official Phenom sample. What a beautiful sight it was:

These chips are launching today, with availability promised by the end of the week. Phenom today is going to be all quad-core only, you'll see dual and triple-core parts in 2008 but for now this is what we get.

The architecture remains mostly unchanged from what we've reported on in the past. This is an evolutionary upgrade to K8 and we've already dedicated many pages to explaining exactly what's new. If you need a refresher, we suggest heading back to our older articles on the topic.

The Long Road to Phenom

Ever wonder why we didn't have an early look at Phenom like we did for every Core 2 processor before the embargo lifted? Not only are CPUs scarce, but AMD itself didn't really know what would be launching until the last moment.

At first Phenom was going to launch at either 2.8GHz or 2.6GHz; then we got word that it would be either 2.6GHz or 2.4GHz. A week ago the story was 2.4GHz and lower, then a few days ago we got the final launch frequencies: 2.2GHz and 2.3GHz.

Then there's the pricing; at 2.2GHz the Phenom 9500 will set you back $251, and at 2.3GHz you'd have to part with $283 (that extra 100MHz is pricey but tastes oh so good).

The problem is, and I hate to ruin the surprise here, Phenom isn't faster than Intel's Core 2 Quad clock for clock. In other words, a 2.3GHz Phenom 9600 will set you back at least $283 and it's slower than a 2.4Ghz Core 2 Quad Q6600, which will only cost you $269. And you were wondering why this review wasn't called The Return of the Jedi.

AMD couldn't simply get enough quantities of the Phenom at 2.4GHz to have a sizable launch this year (not to mention a late discovery of a TLB error in the chips), and the company was committed to delivering Phenom before the holiday buying season as these are tough times and simply waiting to introduce its first quad-core desktop parts was just not an option. Rather than paper launch a 2.4GHz part, AMD chose to go with more modest frequencies, promising faster, more competitive chips in Q1 2008. It's not the best PR story in the world, but it's the honest truth.

Two more quad-core Phenoms will come out in Q1: the 9900 and 9700, clocked at 2.6GHz and 2.4GHz respectively. The Phenom 9900 will be priced below $350 while the 9700 will be a sub-$300 part. As you can probably guess, the introduction of those two will push down the pricing of the 9600 and 9500, which will help Phenom be a bit more competitive.

It's worth mentioning that in the 11th hour AMD decided to introduce a multiplier-unlocked version of the Phenom 9600 sometime this year that will be priced at the same $283 mark. Whether or not it's called a Black Edition is yet to be determined.

Intel Responds with...really?
POST A COMMENT

117 Comments

View All Comments

  • strikeback03 - Tuesday, November 20, 2007 - link

    Didn't Anandtech report that K9 was the name of an architecture they worked on for a while but gave up on? Reply
  • sprockkets - Tuesday, November 20, 2007 - link

    AMD had their improvements, but you are generally right, but not about IBM.

    Remember the days that IBM had the Cyrix processors? You know, the one with model numbers? Where did that go? They went to plucky VIA. So, IBM ditched their x86 business; what makes me think they can compete now?

    Well, that is what you get if you are Intel: Have multiple teams work on processor designs, just in case one sucks.

    Yet, what I always say I will say again, the vast majority of people who need a computer can have their fill with the lowly D201GLY2 board. For those who need gaming or the Aeroglass stuff, you can have a cheap AMD/nVIdia 7025 system.

    As it is painfully clear now, AMD should never have done a native quad core for the desktop. Maybe for servers.
    Reply
  • JumpingJack - Monday, November 19, 2007 - link

    Yet another claiming the "software optimization theory."

    Architectural superiority has been demonstrated in the ability to run code faster.
    Reply
  • Proteusza - Monday, November 19, 2007 - link

    Actually, there is every possibility that he is right.

    First off, how much do you know about instruction sets and compilers? I'm going to assume nothing. If you do know something, then consider this for the edification of other readers.

    Compilers take code written in one language and produce an output in another. Specifically, compilers take code written in a language that can be easily understood by humans (ie C++) and output code that a machine can understand (machine code, or bytecode in the case of a JVM).

    Now, the problem with enhanced instruction sets, like SSE4, and SSE4.1 and SSE4a, is that they require compiler support. Imagine an instruction set as a vocabulary. And compilers are the programs that produce books, using a specified vocabulary. Now, the simple truth is that Intel makes extra effort to get its vocabulary into use. Thus, Cinebench was most likely compiled with Intel's latest vocabulary, and not AMD's.

    So, part of the K10 update was that it allowed SSE operations to be completed much faster, and I'm presuming this requires the use of its new instruction set. If so, that means that Cinebench was basically running in K8 mode.

    Not so far fetched, just means AMD has to make sure people update their code. The instruction set issue is another reason why RISC CPU's are generally simpler and faster.
    Reply
  • JumpingJack - Monday, November 19, 2007 - link

    Look... it is code, that is all ... AMD and Intel are both designing to the same code base, run it on one... then run it on the other... which is faster?

    Architectural jargon of IMC and victim L3 cache, and x-bit look up ... if it doesn't work it doesn't work.
    Reply
  • Kiijibari - Monday, November 19, 2007 - link

    Lol .. just code ... imagine a guy talking in a south west Chinese dialect to you. You do not understand anything ? Well .. it is just a language ... ;-)

    No offense intended: Please do some read up on compliers and programming languages .. it is interesting :)

    cheers

    Kiiji
    Reply
  • Brunnis - Monday, November 19, 2007 - link

    Acutally, there shouldn't be any code modifications needed to make use of the new SSE functionality. The difference is internal to the CPU, meaning that it now processes SSE instructions without splitting them. The instructions used are the same as before.

    That said, there may be untapped potential in the CPU that can be uncovered by the use of a different compiler (due to other reasons). Though, as far as I know, Intel compilers often produce faster code even for AMD CPUs...

    About the "architectural advantage" Anand mentioned: Of course the Core 2 has an architectural advantage. It's pretty obvious from the fact that it performs faster, clock-for-clock, in almost all cases while having much higher frequency potential. Not even AMD's integrated memory controller can raise the computational efficiency of their CPU enough to really challenge Intel. AMD may have a more elegant external design and interface to the rest of the system (native quad, HyperTransport, integrated memory controller), but Intel obviously has the more refined internal design. Sadly for AMD, a computational advantage seems to weigh heavier than a neat system/core interface in this case.
    Reply
  • Kiijibari - Monday, November 19, 2007 - link

    quote:

    Acutally, there shouldn't be any code modifications needed to make use of the new SSE functionality. The difference is internal to the CPU, meaning that it now processes SSE instructions without splitting them. The instructions used are the same as before.
    Yes I know what you mean, the SSE instructions are the same, they are just executed faster (in 1 clock compared to 2 clocks before). That is correct, however I wonder how much code is out there that is compiled with the old Intel compilers until 9.X.

    The problem with these compilers were, that they did not executed the SSE2 codepath on AMD chips, even if the CPU would have been capable of executing it. Instead a slower FPU code is used for AMD K8s.

    The newest Intel 10 Compilers have now new compiler flags that can generate SSE2 code for non-intel CPUs, however I did not have seen benches of these so far.

    Even the M$ Compiler had some nasty SSE disable "features":
    http://einstein.phys.uwm.edu/forum_thread.php?id=6...">http://einstein.phys.uwm.edu/forum_thread.php?id=6...

    All in all, I guess there are a lot of programs out there that disable SSE on AMD CPUs :( Therefore a plain compile test of several open-sorce prgorams with gcc / Sun / Pathscale compilers would be nice. Intel CPUs could be benched with Intel compiler, too, any CPU should gets it best code.

    cheers

    Kiiji
    Reply
  • Kiijibari - Monday, November 19, 2007 - link

    Yet another wise guy knowing nothing ...

    Lets imagine an English native speaker ... would he understand Spanish ? No, not much ... but maybe his fried, who learned Spanish in school is better in speaking Spanish, nevertheless, he wont be as good as a native Spanish speaker ...

    Who would be the guy with the "superior, best language capabilities" now? The Spanish, the English speaking guy, or his friend ?

    Think about it a little bit I am curious about your reply ^^

    cheers

    Kiiji
    Reply
  • MrKaz - Monday, November 19, 2007 - link

    “AMD couldn't simply get enough quantities of the Phenom at 2.4GHz to have a sizable launch this year (not to mention a late discovery of a TLB error in the chips),…”

    I’m very interested in the bug you talked Anand.
    Could you say if you know how it affects the CPU:
    -Performance?
    -Clock speed?
    -Slow northbridge clocks?
    Or the bug no longer exists in these CPUs?


    Complete disappointment.
    At least AMD release the 790 motherboards so I can at least put my old CPU on that system with two Ati 3850 cards… ;)
    Reply

Log in

Don't have an account? Sign up now