To say that AMD has been uncharacteristically quiet lately would be an understatement of epic proportions. The company that had been so vocal about their K8 architecture in the past will hardly say anything at all about future products, extending even to its forthcoming AM2 platform. In just two months AMD is scheduled to officially unveil its first DDR2 platform (Socket-AM2), but we've heard virtually nothing about performance expectations.

Back in January we sought to discover for ourselves what AMD's Socket-AM2 platform would have in store for end users. You'll remember that when Intel made the shift to DDR2 it basically yielded no tangible performance improvement, and we were all quite afraid that the same would be true of AM2. When we finally tested the AM2 samples that were available at the time, performance was absolutely dismal. Not only could AMD's AM2 not outperform currently shipping Socket-939 platforms, but due to serious issues with the chip's memory controller performance was significantly lower.

Given that AMD was supposed to launch in June at Computex, the fact that AM2 was performing so poorly just five months before launch was cause for worry. Despite our worries, we elected not to publish benchmark results and to give AMD more time to fix the problems. We're not interested in creating mass panic by testing a product that's clearly premature.

In February we tried once more, this time with a new spin of the AM2 silicon, but performance continued to be lower than Socket-939. Luckily for AMD, the performance had improved significantly, so it was slower than Socket-939 but not as much as before.

The next revision of the AM2 silicon we received sometime in March, and this one finally added support for DDR2-800, which is what AM2 will launch with supposedly at Computex. With the launch only three months out, we expected performance to be at final shipping levels, and we were left disappointed once more. Even with DDR2-800 at the best timings we could manage back then, Socket-AM2 was unable to outperform Socket-939 at DDR-400.

That brings us to today; we're now in the month of April, with less than two months before AMD's official unveiling of its Socket-AM2 platform at Computex in June, and yes we have a brand new spin of AM2 silicon here to test. We should note that it's not all AMD that's been holding AM2 performance behind. The motherboard makers have of course gone through their fair share of board revisions, not to mention the various chipset revisions that have changed performance as well. Regardless, according to internal AMD documents, AM2 CPUs are going to start being sold to distributors starting next month, leaving very little time for significant changes to the CPU to impact performance. We feel that now is as good of a time to preview AM2 performance and put things into perspective as we're likely to get before the official launch.

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  • flemlion - Monday, April 10, 2006 - link

    This seems to be just a quicky review. In the conclusion it is mentioned that the usefullness of memory bandwith increases as the CPU clock speed increases. But still a lower speed was used for this test than for the DDR1-400 versus DDR1-500 evaluation. It seems to me at least this test should either have been done at different speeds to get a feel of this impact or at minimum at the same speed of the DDR1-400 versus DDR1-500 article.
    As a sidenote, it's also interesting to see that the test config has no mention of the CPU speed that was used. If this is NDA, then say so, if not it just appears as hiding the details that would expose this article as gossip instead of information.
    Reply
  • andrewln - Monday, April 10, 2006 - link

    I meant...
    Intel will see how the next generation of AMD works just 5% faster....wouldn't they tune down conroe to match or make it just a bit faster than AMD and sell at the premium price? Since the demand will be almost the same.
    1) AMD fanboi will keep on buying AMD
    2) Intel fanboy will keep on buying Intel
    3) But this time, people that wants performance, will be buying Intel (even though its only a 10% faster than the competitor, or 40$)

    This way, when AMD makes a new gen of procesor, Intel only have to tune up Conroe which is cheaper than making another big modification that might or might not work.
    Reply
  • Conroe - Monday, April 10, 2006 - link

    They said 20%, and thats where they plan on staying. Theu could have more. The FX-62 has extra cache, it may give 10% who knows? Reply
  • Anand Lal Shimpi - Monday, April 10, 2006 - link

    Every FX-62 I've seen hasn't had any more cache than what's in the table in the review.

    Take care,
    Anand
    Reply
  • Dfere - Monday, April 10, 2006 - link

    I’ve got to disagree- I don’t think this makes sense to even upgrade from a 754 system to AM2.

    Why? Because if you remember Nforce 2- and all the Mb’s with “future- proof” DDR-400 systems, the MB makers did not live up to their claims. For most recognized mfg’s it took the revision after DDR-400 memory was available before most of them got it right.

    So I don’t see where AM2 can even be thought of as an upgrade path, especially before final revisions have been made in silicon. A MB you buy initially might work, but with future memory or processors… forget it. Anybody wanna take a bet ($1 will get you $10), that the first MB’s out by lets say- ASUS, do not allow for different memory timings or the latest memory say March of 07?, let alone a top of the line processor, same date?

    While the author did say many changes are still in the works, final silicon may not yet even been achieved. How can buying a MB now be considered a possible upgrade in the future?

    For this reason, and many price/performance reasons, I have a 754 system, and I will hope that after tax season ends I can build a 939 for a better price. That’s it.

    The numbers per the review state this clearly. This is not about performance. And it will be expensive. The analysis on the forum here site seems to indicate that the relative analysis is expected future performance, when Anand admittedly and AMD (by not making announcements about performance) seem to indicate (and I explicitly do) that this is not about performance…. Yet either. So how can this even be recommended as an upgrade path when there is very little real world benefit and future compatibility a MB purchased now and memory or processors is not even known.

    I am an avid fan of AMD, but I think excess hype can kill a product as quickly as bad rumors.
    Reply
  • HammerFan - Monday, April 10, 2006 - link

    I'm suprised that nobody has considered the bottlenecks in AMD's systems as of late. Recently, it seems that all AMD really needs to do with the K8 is keep squeezing more MHz out of it. Clearly the CPU has enough memory bandwidth to spare, so bring the rest of the processor up to speed. IIRC, AMD is starting to implement an improved version of SOI in their new CPU cores (or is it 65nm cores?), which will help increase clock-speed headroom. Also, as quality continues to improve, AMD might be able to add higher clock speeds to take advantage.

    just my $.02

    HF
    Reply
  • ozzimark - Monday, April 10, 2006 - link

    one thing that would REALLY help K8... follow intel's footsteps with netburst and try to double-pump the ALU. faster SSE execution never hurts either :) Reply
  • still - Monday, April 10, 2006 - link

    Double-pumping the ALU is only going to limit scaling and increase heat... what the K8 core really needs is better L1 and L2 cache subsystem.... The L1 is sort of ok but getting old it the same one the K7 (7 year old). They improved the L2 of the K8 over K7 but half heartedly. It still has too narrow of a path and too high of a latency. I can just imagine what the K8 can do with a 4M low latency cache that has 256 or 512 bit width data path (+ ECC of course).
    While they are there lower the L1 latency to 2 cycles. That alone is 5-10 % improvement.
    And they need to seriously improve the SIMD execution units. The current AMD SIMD units are almost as lame as the Intel implementation of AMDs 64bit instructions.
    Oh yeaa and write some decent compilers to make use of the 64 bit goodness like extra register - where are the promised 20 % improvements?
    The K8 core can scale better than Conroe and can crunch trough more instructions/data if the cache subsystem can feed all these to the execution units. Albeit the K8 has to be clocked slightly higher to do that - such is the tradeoff of 3 vs. 4 IPC.
    Reply
  • mino - Tuesday, April 11, 2006 - link

    1) 3-cycle L1 on K7/K8 is the fastest required, it goes from the internal structure if the scheduler and the pipeline that 2-cycle chache would do almost no good. Also they would have to reduce L1 size to 32k+32k which would hurt. It simply does not make sense to change L1 at all, maybe on K8L but IMHO 128k+128k would help much more than 2-cycle latency.

    2) 17-cycle L2 is PRETTY GOOD for 1M L2 with exclusive structure!!! IMHO it is possible to do 16-cycle, maybe 15, but nowhere near Dothan's 10-cycle. Also remember lower-latency L2 has scaling problems (that's why intel made prescott's L2 slower than NW's)

    3) Concerning the memory subsystem(caches + memory) (on single-socket K8/K8L) the biggest issue is the robustness(amount of on the fly acceses to memory) and latency of the memory controller. To solve this is not trivial thing. IMHO to add 2-4M L3 with random access ~50 cycles would do.

    4) In the >4 sockets front all they need is effective caching of MOESI snoops.

    You are also forgot K7/K8 is mostly KISS architecture. It is just wery well balanced so has good performance in the end. However do one wrong change and you are screwed.
    KISS == Keep It Simple Silly

    About "weak" SIMD implementation on AMD, don't fool yourselves guys. Only x86 architecture faster than K8 on SSE/SSE2 is Netburst aka SIMD-by-intel.

    About conroe, ita has twice as wide ALU's and FPU's than PIII/K7/K8, this means it has huge resources at disposal to calculate SIMD.
    Same goes for K8L 2 quarters later. That said K7/K8 core has far more FP power than P6 architecture. On FP Conroe and K8 are about aquall.
    but K8L will wipe the floor with K8 and Conroe on FP. Conroe will wipe K8 on INT and be still faster than K8L by decent margin.

    Overall we are for another PIII vs. K7 battle with single very important change - AMD has a platform it had not back in the K7 vs. PIII days.
    Reply
  • fitten - Thursday, April 13, 2006 - link

    I find the K8L a somewhat odd strategy. I guess they are targeting the Itanium market because Opterons already have a good part of the HPC market. Given that the HPC people are the ones that really care about FPU performance and that they are still a fairly small market segment, it seems an odd target. Integer performance rules the roost for servers... web, database, and just about everything else you can think of other than number crunching simulations and the like. Desktop uses for FPU are a few like games and some mathmatical stuff. Intel is focusing on integer performance at least as much as FPU with Conroe (Conroe gets a good dose of both), which makes sense to me since so much of the work done on computers, both desktops and servers, is dominated by integer operations. K8L speculation says only FPU horsepower will be added... just doesn't seem like a sound decision to me. Reply

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