AMD Zen Microarchitecture: Dual Schedulers, Micro-Op Cache and Memory Hierarchy Revealed
by Ian Cutress on August 18, 2016 9:00 AM ESTLow Power, FinFET and Clock Gating
When AMD launched Carrizo and Bristol Ridge for notebooks, one of the big stories was how AMD had implemented a number of techniques to improve power consumption and subsequently increase efficiency. A number of those lessons have come through with Zen, as well as a few new aspects in play due to the lithography.
First up is the FinFET effect. Regular readers of AnandTech and those that follow the industry will already be bored to death with FinFET, but the design allows for a lower power version of a transistor at a given frequency. Now of course everyone using FinFET can have a different implementation which gives specific power/performance characteristics, but Zen on the 14nm FinFET process at Global Foundries is already a known quantity with AMD’s Polaris GPUs which are built similarly. The combination of FinFET with the fact that AMD confirmed that they will be using the density-optimised version of 14nm FinFET (which will allow for smaller die sizes and more reasonable efficiency points) also contributes to a shift of either higher performance at the same power or the same performance at lower power.
AMD stated in the brief that power consumption and efficiency was constantly drilled into the engineers, and as explained in previous briefings, there ends up being a tradeoff between performance and efficiency about what can be done for a number of elements of the core (e.g. 1% performance might cost 2% efficiency). For Zen, the micro-op cache will save power by not having to go further out to get instruction data, improved prefetch and a couple of other features such as move elimination will also reduce the work, but AMD also states that cores will be aggressively clock gated to improve efficiency.
We saw with AMD’s 7th Gen APUs that power gating was also a target with that design, especially when remaining at the best efficiency point (given specific performance) is usually the best policy. The way the diagram above is laid out would seem to suggest that different parts of the core could independently be clock gated depending on use (e.g. decode vs FP ports), although we were not able to confirm if this is the case. It also relies on having very quick (1-2 cycle) clock gating implementations, and note that clock gating is different to power-gating, which is harder to implement.
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Kevin G - Saturday, August 20, 2016 - link
HyperTransport was an AMD creation though they were not the first to use it. Former DEC engineers did help create it but they were employees by AMD at the time. AMD did license the EV6 bus for the the first Athlon (not Athlon 64). The first chip to that used the HT bus was Transmeta due to delays on the first generation Athlon 64/Operton.slyronit - Tuesday, August 23, 2016 - link
Ah! Good old days! I used to read all this in "Chip" magazine back in the day. Cyber cafes those days used "Cyrix" CPUs. Cheap.BMNify - Friday, August 19, 2016 - link
thats the thing, Did AMD actually learn something from their ARM inc partners and put in a real up to date interconnect or two that can lower overall latency and massively improve data throughput (ready with HBM2 perhaps) or did they cheap out again and rehash the usual antiquated suspectsnandnandnand - Thursday, August 18, 2016 - link
Good. I want Zen to perform well. Let's see Intel copy AMD and offer a 8c/16t chip at mainstream prices.akamateau - Thursday, August 18, 2016 - link
Hmmm...AMD was first with 1Ghz and faster processors.
AMD was first with multi-core processor.
AMD was first with CPU + GPU = APU. Intel has the laughably poor performing Intel IGP LOL. And to get it Intle had to poach technology from NVidia and then NVidia sued them!!!! LOL
AMD owns X86-64.
SO your point?????
AMD has a license to copy Intel and if like Frank Sinatra chooses to do it their way, it can only be good for the consumer.
So smarten up. Without AMD Intel would have killed the PC 10 years ago with $2000 CPU's!!!
smilingcrow - Thursday, August 18, 2016 - link
I don't live in the past from a decade ago. When AMD finally release their first decent CPU in 10 years wake me up.Even with negligible competition from AMD Intel has chosen to keep the prices of chips for the mainstream socket at low levels for 10 years. It was 2009 with Lynnfield that they last had a $1,000 Extreme chip for consumers and there were plenty of good chips in that range starting at under $300 so the Extreme chips were for rich fools really.
The_Countess - Saturday, August 20, 2016 - link
intel created a entire artificial market segment with the i5's because of lack of competition. they still sell dual cores for christ sake, and havent offered anything above 4 cores on the main stream market, which AMD's had for over 6 years already.On 22nm, let alone 14, there is no way they couldn't have made a affordable 6 core. but all we get are ridiculously priced -E variants on a ridiculously overpriced platform.
FMinus - Thursday, August 18, 2016 - link
that is still at most ~20 years back, AMD is on the face of the earth for 47 years and more as half of that they spend innovating nothing, but being contractors and priates of technology.tamalero - Friday, August 19, 2016 - link
whats with hardcore intel fanboys just getting out of their caves now that AMD might have a decent cpu to compete with Intel?The_Countess - Saturday, August 20, 2016 - link
and they went from that to creating the athlon64 and royally kicking intel's ass with superior innovations in just 14 years (counting from the first k5).to bad intel's monopoly abuse has already done its damage leaving AMD wofully short on production capacity meaning 80% of people still had to buy intel's crummy shit for too much money. and with AMD not making nearly as much money as it should have from the athlon64, intel could one again copy everything AMD did and then brute force outspend them.